From 597028cc2840d9182523bd0179a1f95ddd931dae Mon Sep 17 00:00:00 2001 From: Johnny Chen Date: Mon, 4 Apr 2011 23:57:05 +0000 Subject: [PATCH] A8.6.105 MUL Inst{15-12} should be specified as 0b0000. rdar://problem/9231168 ARM disassembler discrepancy: erroneously accepting MUL git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128862 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.td | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 508d0b28040..fabf95be773 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -2687,7 +2687,9 @@ def MULv5: ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, def MUL : AsMul1I32<0b0000000, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), IIC_iMUL32, "mul", "\t$Rd, $Rn, $Rm", [(set GPR:$Rd, (mul GPR:$Rn, GPR:$Rm))]>, - Requires<[IsARM, HasV6]>; + Requires<[IsARM, HasV6]> { + let Inst{15-12} = 0b0000; +} } let Constraints = "@earlyclobber $Rd" in