Run ProcessImplicitDefs on SSA form where it can be much simpler.

Implicitly defined virtual registers can simply have the <undef> bit set
on all uses, and copies can be turned into implicit defs recursively.

Physical registers are a bit trickier. We handle the common case where a
physreg def is used by a nearby instruction in the same basic block. For
more complicated cases, just leave the IMPLICIT_DEF instruction in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159149 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-06-25 18:12:18 +00:00
parent 3769fe149b
commit 5984d2b31f
3 changed files with 102 additions and 265 deletions
+2 -6
View File
@@ -572,6 +572,8 @@ void TargetPassConfig::addFastRegAlloc(FunctionPass *RegAllocPass) {
/// optimized register allocation, including coalescing, machine instruction
/// scheduling, and register allocation itself.
void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
addPass(ProcessImplicitDefsID);
// LiveVariables currently requires pure SSA form.
//
// FIXME: Once TwoAddressInstruction pass no longer uses kill flags,
@@ -590,12 +592,6 @@ void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
}
addPass(TwoAddressInstructionPassID);
// FIXME: Either remove this pass completely, or fix it so that it works on
// SSA form. We could modify LiveIntervals to be independent of this pass, But
// it would be even better to simply eliminate *all* IMPLICIT_DEFs before
// leaving SSA.
addPass(ProcessImplicitDefsID);
if (EnableStrongPHIElim)
addPass(StrongPHIEliminationID);