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Optimize icmp involving addition better
Allows LLVM to optimize sequences like the following: %add = add nsw i32 %x, 1 %cmp = icmp sgt i32 %add, %y into: %cmp = icmp sge i32 %x, %y as well as: %add1 = add nsw i32 %x, 20 %add2 = add nsw i32 %y, 57 %cmp = icmp sge i32 %add1, %add2 into: %add = add nsw i32 %y, 37 %cmp = icmp sle i32 %cmp, %x git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179316 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2487,6 +2487,55 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
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return new ICmpInst(Pred, Y, Z);
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}
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// icmp slt (X + -1), Y -> icmp sle X, Y
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if (A && NoOp0WrapProblem && Pred == CmpInst::ICMP_SLT &&
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match(B, m_AllOnes()))
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return new ICmpInst(CmpInst::ICMP_SLE, A, Op1);
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// icmp sge (X + -1), Y -> icmp sgt X, Y
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if (A && NoOp0WrapProblem && Pred == CmpInst::ICMP_SGE &&
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match(B, m_AllOnes()))
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return new ICmpInst(CmpInst::ICMP_SGT, A, Op1);
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// icmp sle (X + 1), Y -> icmp slt X, Y
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if (A && NoOp0WrapProblem && Pred == CmpInst::ICMP_SLE &&
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match(B, m_One()))
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return new ICmpInst(CmpInst::ICMP_SLT, A, Op1);
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// icmp sgt (X + 1), Y -> icmp sge X, Y
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if (A && NoOp0WrapProblem && Pred == CmpInst::ICMP_SGT &&
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match(B, m_One()))
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return new ICmpInst(CmpInst::ICMP_SGE, A, Op1);
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// if C1 has greater magnitude than C2:
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// icmp (X + C1), (Y + C2) -> icmp (X + C3), Y
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// s.t. C3 = C1 - C2
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//
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// if C2 has greater magnitude than C1:
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// icmp (X + C1), (Y + C2) -> icmp X, (Y + C3)
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// s.t. C3 = C2 - C1
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if (A && C && NoOp0WrapProblem && NoOp1WrapProblem &&
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(BO0->hasOneUse() || BO1->hasOneUse()) && !I.isUnsigned())
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if (ConstantInt *C1 = dyn_cast<ConstantInt>(B))
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if (ConstantInt *C2 = dyn_cast<ConstantInt>(D)) {
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const APInt &AP1 = C1->getValue();
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const APInt &AP2 = C2->getValue();
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if (AP1.isNegative() == AP2.isNegative()) {
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APInt AP1Abs = C1->getValue().abs();
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APInt AP2Abs = C2->getValue().abs();
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if (AP1Abs.uge(AP2Abs)) {
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ConstantInt *C3 = Builder->getInt(AP1 - AP2);
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Value *NewAdd = Builder->CreateNSWAdd(A, C3);
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return new ICmpInst(Pred, NewAdd, C);
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} else {
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ConstantInt *C3 = Builder->getInt(AP2 - AP1);
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Value *NewAdd = Builder->CreateNSWAdd(C, C3);
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return new ICmpInst(Pred, A, NewAdd);
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}
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}
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}
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// Analyze the case when either Op0 or Op1 is a sub instruction.
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// Op0 = A - B (or A and B are null); Op1 = C - D (or C and D are null).
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A = 0; B = 0; C = 0; D = 0;
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@ -886,3 +886,55 @@ define i1 @icmp_mul0_ne0(i32 %x) {
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%cmp = icmp ne i32 %mul, 0
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ret i1 %cmp
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}
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; CHECK: @icmp_sub1_sge
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; CHECK-NEXT: icmp sgt i32 %x, %y
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define i1 @icmp_sub1_sge(i32 %x, i32 %y) {
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%sub = add nsw i32 %x, -1
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%cmp = icmp sge i32 %sub, %y
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ret i1 %cmp
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}
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; CHECK: @icmp_add1_sgt
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; CHECK-NEXT: icmp sge i32 %x, %y
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define i1 @icmp_add1_sgt(i32 %x, i32 %y) {
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%add = add nsw i32 %x, 1
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%cmp = icmp sgt i32 %add, %y
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ret i1 %cmp
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}
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; CHECK: @icmp_sub1_slt
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; CHECK-NEXT: icmp sle i32 %x, %y
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define i1 @icmp_sub1_slt(i32 %x, i32 %y) {
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%sub = add nsw i32 %x, -1
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%cmp = icmp slt i32 %sub, %y
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ret i1 %cmp
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}
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; CHECK: @icmp_add1_sle
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; CHECK-NEXT: icmp slt i32 %x, %y
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define i1 @icmp_add1_sle(i32 %x, i32 %y) {
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%add = add nsw i32 %x, 1
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%cmp = icmp sle i32 %add, %y
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ret i1 %cmp
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}
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; CHECK: @icmp_add20_sge_add57
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; CHECK-NEXT: [[ADD:%[a-z0-9]+]] = add nsw i32 %y, 37
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; CHECK-NEXT: icmp sle i32 [[ADD]], %x
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define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) {
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%1 = add nsw i32 %x, 20
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%2 = add nsw i32 %y, 57
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%cmp = icmp sge i32 %1, %2
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ret i1 %cmp
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}
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; CHECK: @icmp_sub57_sge_sub20
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; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = add nsw i32 %x, -37
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; CHECK-NEXT: icmp sge i32 [[SUB]], %y
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define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) {
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%1 = add nsw i32 %x, -57
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%2 = add nsw i32 %y, -20
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%cmp = icmp sge i32 %1, %2
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ret i1 %cmp
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}
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