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SubRegIndex'ize MSP430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104513 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -65,7 +65,10 @@ def : SubRegSet<1, [PCW, SPW, SRW, CGW, FPW,
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[PCB, SPB, SRB, CGB, FPB,
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R5B, R6B, R7B, R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>;
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def subreg_8bit : PatLeaf<(i32 1)>;
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def subreg_8bit : SubRegIndex {
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let NumberHack = 1;
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let Namespace = "MSP430";
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}
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def GR8 : RegisterClass<"MSP430", [i8], 8,
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// Volatile registers
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