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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-19 03:29:22 +00:00
Make FP_TO_UINT Illegal. This allows us to generate significantly better
codegen for FP_TO_UINT by using the legalizer's SELECT variant.
Implement a codegen improvement for SELECT_CC, selecting the false node in
the MBB that feeds the phi node. This allows us to codegen:
void foo(int *a, int b, int c) { int d = (a < b) ? 5 : 9; *a = d; }
as:
_foo:
li r2, 5
cmpw cr0, r4, r3
bgt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
li r2, 9
.LBB_foo_2: ; entry
stw r2, 0(r3)
blr
insted of:
_foo:
li r2, 5
li r5, 9
cmpw cr0, r4, r3
bgt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r5, r5
.LBB_foo_2: ; entry
stw r2, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22784 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nate Begeman
parent
40b37cc28d
commit
5a01481585
@ -88,6 +88,9 @@ namespace {
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setOperationAction(ISD::SELECT, MVT::f32, Expand);
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setOperationAction(ISD::SELECT, MVT::f64, Expand);
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// PowerPC does not have FP_TO_UINT
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setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
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setSetCCResultContents(ZeroOrOneSetCCResult);
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addLegalFPImmediate(+0.0); // Necessary for FSEL
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addLegalFPImmediate(-0.0); //
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@ -1341,8 +1344,8 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
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switch (opcode) {
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default:
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Node->dump();
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assert(0 && "\nNode not handled!\n");
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Node->dump(); std::cerr << '\n';
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assert(0 && "Node not handled!\n");
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case ISD::UNDEF:
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BuildMI(BB, PPC::IMPLICIT_DEF, 0, Result);
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return Result;
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@ -2000,75 +2003,14 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
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return Result+N.ResNo;
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}
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case ISD::FP_TO_UINT:
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case ISD::FP_TO_SINT: {
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bool U = (ISD::FP_TO_UINT == opcode);
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Tmp1 = SelectExpr(N.getOperand(0));
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if (!U) {
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Tmp2 = MakeFPReg();
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BuildMI(BB, PPC::FCTIWZ, 1, Tmp2).addReg(Tmp1);
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int FrameIdx = BB->getParent()->getFrameInfo()->CreateStackObject(8, 8);
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addFrameReference(BuildMI(BB, PPC::STFD, 3).addReg(Tmp2), FrameIdx);
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addFrameReference(BuildMI(BB, PPC::LWZ, 2, Result), FrameIdx, 4);
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return Result;
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} else {
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unsigned Zero = getConstDouble(0.0);
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unsigned MaxInt = getConstDouble((1LL << 32) - 1);
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unsigned Border = getConstDouble(1LL << 31);
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unsigned UseZero = MakeFPReg();
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unsigned UseMaxInt = MakeFPReg();
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unsigned UseChoice = MakeFPReg();
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unsigned TmpReg = MakeFPReg();
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unsigned TmpReg2 = MakeFPReg();
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unsigned ConvReg = MakeFPReg();
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unsigned IntTmp = MakeIntReg();
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unsigned XorReg = MakeIntReg();
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MachineFunction *F = BB->getParent();
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int FrameIdx = F->getFrameInfo()->CreateStackObject(8, 8);
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// Update machine-CFG edges
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MachineBasicBlock *XorMBB = new MachineBasicBlock(BB->getBasicBlock());
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MachineBasicBlock *PhiMBB = new MachineBasicBlock(BB->getBasicBlock());
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MachineBasicBlock *OldMBB = BB;
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ilist<MachineBasicBlock>::iterator It = BB; ++It;
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F->getBasicBlockList().insert(It, XorMBB);
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F->getBasicBlockList().insert(It, PhiMBB);
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BB->addSuccessor(XorMBB);
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BB->addSuccessor(PhiMBB);
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// Convert from floating point to unsigned 32-bit value
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// Use 0 if incoming value is < 0.0
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BuildMI(BB, PPC::FSEL, 3, UseZero).addReg(Tmp1).addReg(Tmp1).addReg(Zero);
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// Use 2**32 - 1 if incoming value is >= 2**32
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BuildMI(BB, PPC::FSUB, 2, UseMaxInt).addReg(MaxInt).addReg(Tmp1);
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BuildMI(BB, PPC::FSEL, 3, UseChoice).addReg(UseMaxInt).addReg(UseZero)
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.addReg(MaxInt);
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// Subtract 2**31
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BuildMI(BB, PPC::FSUB, 2, TmpReg).addReg(UseChoice).addReg(Border);
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// Use difference if >= 2**31
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BuildMI(BB, PPC::FCMPU, 2, PPC::CR0).addReg(UseChoice).addReg(Border);
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BuildMI(BB, PPC::FSEL, 3, TmpReg2).addReg(TmpReg).addReg(TmpReg)
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.addReg(UseChoice);
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// Convert to integer
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BuildMI(BB, PPC::FCTIWZ, 1, ConvReg).addReg(TmpReg2);
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addFrameReference(BuildMI(BB, PPC::STFD, 3).addReg(ConvReg), FrameIdx);
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addFrameReference(BuildMI(BB, PPC::LWZ, 2, IntTmp), FrameIdx, 4);
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BuildMI(BB, PPC::BLT, 2).addReg(PPC::CR0).addMBB(PhiMBB);
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BuildMI(BB, PPC::B, 1).addMBB(XorMBB);
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// XorMBB:
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// add 2**31 if input was >= 2**31
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BB = XorMBB;
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BuildMI(BB, PPC::XORIS, 2, XorReg).addReg(IntTmp).addImm(0x8000);
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XorMBB->addSuccessor(PhiMBB);
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// PhiMBB:
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// DestReg = phi [ IntTmp, OldMBB ], [ XorReg, XorMBB ]
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BB = PhiMBB;
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BuildMI(BB, PPC::PHI, 4, Result).addReg(IntTmp).addMBB(OldMBB)
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.addReg(XorReg).addMBB(XorMBB);
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return Result;
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}
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assert(0 && "Should never get here");
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return 0;
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Tmp2 = MakeFPReg();
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BuildMI(BB, PPC::FCTIWZ, 1, Tmp2).addReg(Tmp1);
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int FrameIdx = BB->getParent()->getFrameInfo()->CreateStackObject(8, 8);
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addFrameReference(BuildMI(BB, PPC::STFD, 3).addReg(Tmp2), FrameIdx);
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addFrameReference(BuildMI(BB, PPC::LWZ, 2, Result), FrameIdx, 4);
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return Result;
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}
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case ISD::SETCC: {
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@ -2217,8 +2159,12 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
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assert(0 && "Should never get here");
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}
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unsigned TrueValue = SelectExpr(N.getOperand(2)); //Use if TRUE
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unsigned FalseValue = SelectExpr(N.getOperand(3)); //Use if FALSE
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// If the False value only has one use, we can generate better code by
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// selecting it in the fallthrough basic block rather than here, which
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// increases register pressure.
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bool FalseHasOneUse = N.getOperand(3).Val->hasOneUse();
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unsigned TrueValue = SelectExpr(N.getOperand(2));
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unsigned FalseValue = FalseHasOneUse ? 0 : SelectExpr(N.getOperand(3));
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unsigned CCReg = SelectCC(N.getOperand(0), N.getOperand(1), CC);
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Opc = getBCCForSetCC(CC);
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@ -2249,6 +2195,7 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
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// %FalseValue = ...
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// # fallthrough to sinkMBB
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BB = copy0MBB;
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if (FalseHasOneUse) FalseValue = SelectExpr(N.getOperand(3));
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// Update machine-CFG edges
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BB->addSuccessor(sinkMBB);
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@ -8,6 +8,23 @@ TODO:
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la r2, lo16(l2__ZTV4Cell)(r2)
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addi r2, r2, 8
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* Teach LLVM how to codegen this:
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unsigned short foo(float a) { return a; }
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as:
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_foo:
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fctiwz f0,f1
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stfd f0,-8(r1)
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lhz r3,-2(r1)
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blr
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not:
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_foo:
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fctiwz f0, f1
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stfd f0, -8(r1)
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lwz r2, -4(r1)
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rlwinm r3, r2, 0, 16, 31
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blr
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* Support 'update' load/store instructions. These are cracked on the G5, but
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are still a codesize win.
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