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[MIScheduler] Slightly better handling of constrainLocalCopy when both source and dest are local
This fixes PR21792. Differential Revision: http://reviews.llvm.org/D6823 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226433 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1434,12 +1434,15 @@ void CopyConstrain::constrainLocalCopy(SUnit *CopySU, ScheduleDAGMILive *DAG) {
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// Check if either the dest or source is local. If it's live across a back
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// Check if either the dest or source is local. If it's live across a back
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// edge, it's not local. Note that if both vregs are live across the back
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// edge, it's not local. Note that if both vregs are live across the back
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// edge, we cannot successfully contrain the copy without cyclic scheduling.
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// edge, we cannot successfully contrain the copy without cyclic scheduling.
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unsigned LocalReg = DstReg;
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// If both the copy's source and dest are local live intervals, then we
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unsigned GlobalReg = SrcReg;
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// should treat the dest as the global for the purpose of adding
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// constraints. This adds edges from source's other uses to the copy.
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unsigned LocalReg = SrcReg;
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unsigned GlobalReg = DstReg;
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LiveInterval *LocalLI = &LIS->getInterval(LocalReg);
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LiveInterval *LocalLI = &LIS->getInterval(LocalReg);
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if (!LocalLI->isLocal(RegionBeginIdx, RegionEndIdx)) {
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if (!LocalLI->isLocal(RegionBeginIdx, RegionEndIdx)) {
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LocalReg = SrcReg;
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LocalReg = DstReg;
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GlobalReg = DstReg;
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GlobalReg = SrcReg;
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LocalLI = &LIS->getInterval(LocalReg);
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LocalLI = &LIS->getInterval(LocalReg);
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if (!LocalLI->isLocal(RegionBeginIdx, RegionEndIdx))
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if (!LocalLI->isLocal(RegionBeginIdx, RegionEndIdx))
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return;
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return;
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41
test/CodeGen/X86/pr21792.ll
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41
test/CodeGen/X86/pr21792.ll
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@ -0,0 +1,41 @@
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; RUN: llc -mtriple=x86_64-linux -mcpu=corei7 < %s | FileCheck %s
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; This fixes a missing cases in the MI scheduler's constrainLocalCopy exposed by
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; PR21792
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@stuff = external constant [256 x double], align 16
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define void @func(<4 x float> %vx) {
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entry:
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%tmp2 = bitcast <4 x float> %vx to <2 x i64>
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%and.i = and <2 x i64> %tmp2, <i64 8727373547504, i64 8727373547504>
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%tmp3 = bitcast <2 x i64> %and.i to <4 x i32>
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%index.sroa.0.0.vec.extract = extractelement <4 x i32> %tmp3, i32 0
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%idx.ext = sext i32 %index.sroa.0.0.vec.extract to i64
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%add.ptr = getelementptr inbounds i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext
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%tmp4 = bitcast i8* %add.ptr to double*
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%index.sroa.0.4.vec.extract = extractelement <4 x i32> %tmp3, i32 1
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%idx.ext5 = sext i32 %index.sroa.0.4.vec.extract to i64
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%add.ptr6 = getelementptr inbounds i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext5
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%tmp5 = bitcast i8* %add.ptr6 to double*
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%index.sroa.0.8.vec.extract = extractelement <4 x i32> %tmp3, i32 2
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%idx.ext14 = sext i32 %index.sroa.0.8.vec.extract to i64
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%add.ptr15 = getelementptr inbounds i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext14
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%tmp6 = bitcast i8* %add.ptr15 to double*
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%index.sroa.0.12.vec.extract = extractelement <4 x i32> %tmp3, i32 3
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%idx.ext19 = sext i32 %index.sroa.0.12.vec.extract to i64
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%add.ptr20 = getelementptr inbounds i8* bitcast ([256 x double]* @stuff to i8*), i64 %idx.ext19
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%tmp7 = bitcast i8* %add.ptr20 to double*
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%add.ptr46 = getelementptr inbounds i8* bitcast (double* getelementptr inbounds ([256 x double]* @stuff, i64 0, i64 1) to i8*), i64 %idx.ext
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%tmp16 = bitcast i8* %add.ptr46 to double*
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%add.ptr51 = getelementptr inbounds i8* bitcast (double* getelementptr inbounds ([256 x double]* @stuff, i64 0, i64 1) to i8*), i64 %idx.ext5
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%tmp17 = bitcast i8* %add.ptr51 to double*
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call void @toto(double* %tmp4, double* %tmp5, double* %tmp6, double* %tmp7, double* %tmp16, double* %tmp17)
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ret void
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; CHECK-LABEL: func:
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; CHECK: pextrq $1, %xmm0,
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; CHECK-NEXT: movd %xmm0, %r[[AX:..]]
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; CHECK-NEXT: movslq %e[[AX]],
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; CHECK-NEXT: sarq $32, %r[[AX]]
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}
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declare void @toto(double*, double*, double*, double*, double*, double*)
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@ -841,19 +841,18 @@ define <4 x i32> @test8(<4 x i32> %a) {
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; SSE-LABEL: test8:
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; SSE-LABEL: test8:
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; SSE: # BB#0:
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; SSE: # BB#0:
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; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2454267027,2454267027,2454267027,2454267027]
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; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2454267027,2454267027,2454267027,2454267027]
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; SSE-NEXT: movdqa %xmm2, %xmm1
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; SSE-NEXT: psrad $31, %xmm1
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; SSE-NEXT: pand %xmm0, %xmm1
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; SSE-NEXT: movdqa %xmm0, %xmm3
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; SSE-NEXT: movdqa %xmm0, %xmm3
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; SSE-NEXT: psrad $31, %xmm3
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; SSE-NEXT: psrad $31, %xmm3
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; SSE-NEXT: pand %xmm2, %xmm3
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; SSE-NEXT: pand %xmm2, %xmm3
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; SSE-NEXT: paddd %xmm1, %xmm3
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; SSE-NEXT: movdqa %xmm0, %xmm1
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; SSE-NEXT: movdqa %xmm0, %xmm1
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; SSE-NEXT: pmuludq %xmm2, %xmm1
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; SSE-NEXT: pmuludq %xmm2, %xmm1
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; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
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; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
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; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
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; SSE-NEXT: psrad $31, %xmm2
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; SSE-NEXT: pmuludq %xmm2, %xmm4
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; SSE-NEXT: pand %xmm0, %xmm2
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,3],xmm4[1,3]
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; SSE-NEXT: paddd %xmm2, %xmm3
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; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; SSE-NEXT: pmuludq %xmm4, %xmm2
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,3],xmm2[1,3]
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,1,3]
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,1,3]
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; SSE-NEXT: psubd %xmm3, %xmm1
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; SSE-NEXT: psubd %xmm3, %xmm1
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; SSE-NEXT: paddd %xmm0, %xmm1
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; SSE-NEXT: paddd %xmm0, %xmm1
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@ -76,10 +76,9 @@ define void @add3i16(%i16vec3* nocapture sret %ret, %i16vec3* %ap, %i16vec3* %bp
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; CHECK: pmovzxwd (%{{.*}}), %[[R0:xmm[0-9]+]]
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; CHECK: pmovzxwd (%{{.*}}), %[[R0:xmm[0-9]+]]
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; CHECK-NEXT: pmovzxwd (%{{.*}}), %[[R1:xmm[0-9]+]]
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; CHECK-NEXT: pmovzxwd (%{{.*}}), %[[R1:xmm[0-9]+]]
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; CHECK-NEXT: paddd %[[R0]], %[[R1]]
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; CHECK-NEXT: paddd %[[R0]], %[[R1]]
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; CHECK-NEXT: movdqa %[[R1]], %[[R0]]
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; CHECK-NEXT: pshufb {{.*}}, %[[R0]]
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; CHECK-NEXT: pmovzxdq %[[R0]], %[[R0]]
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; CHECK-NEXT: pextrw $4, %[[R1]], 4(%{{.*}})
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; CHECK-NEXT: pextrw $4, %[[R1]], 4(%{{.*}})
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; CHECK-NEXT: pshufb {{.*}}, %[[R1]]
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; CHECK-NEXT: pmovzxdq %[[R1]], %[[R0]]
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; CHECK-NEXT: movd %[[R0]], (%{{.*}})
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; CHECK-NEXT: movd %[[R0]], (%{{.*}})
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%a = load %i16vec3* %ap, align 16
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%a = load %i16vec3* %ap, align 16
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%b = load %i16vec3* %bp, align 16
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%b = load %i16vec3* %bp, align 16
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@ -144,10 +143,9 @@ define void @add3i8(%i8vec3* nocapture sret %ret, %i8vec3* %ap, %i8vec3* %bp) no
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; CHECK: pmovzxbd (%{{.*}}), %[[R0:xmm[0-9]+]]
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; CHECK: pmovzxbd (%{{.*}}), %[[R0:xmm[0-9]+]]
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; CHECK-NEXT: pmovzxbd (%{{.*}}), %[[R1:xmm[0-9]+]]
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; CHECK-NEXT: pmovzxbd (%{{.*}}), %[[R1:xmm[0-9]+]]
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; CHECK-NEXT: paddd %[[R0]], %[[R1]]
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; CHECK-NEXT: paddd %[[R0]], %[[R1]]
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; CHECK-NEXT: movdqa %[[R1]], %[[R0]]
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; CHECK-NEXT: pshufb {{.*}}, %[[R0]]
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; CHECK-NEXT: pmovzxwq %[[R0]], %[[R0]]
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; CHECK-NEXT: pextrb $8, %[[R1]], 2(%{{.*}})
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; CHECK-NEXT: pextrb $8, %[[R1]], 2(%{{.*}})
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; CHECK-NEXT: pshufb {{.*}}, %[[R1]]
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; CHECK-NEXT: pmovzxwq %[[R1]], %[[R0]]
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; CHECK-NEXT: movd %[[R0]], %e[[R2:[abcd]]]x
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; CHECK-NEXT: movd %[[R0]], %e[[R2:[abcd]]]x
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; CHECK-NEXT: movw %[[R2]]x, (%{{.*}})
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; CHECK-NEXT: movw %[[R2]]x, (%{{.*}})
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%a = load %i8vec3* %ap, align 16
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%a = load %i8vec3* %ap, align 16
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@ -206,10 +204,9 @@ define void @rot(%i8vec3pack* nocapture sret %result, %i8vec3pack* %X, %i8vec3pa
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; CHECK-NEXT: pinsrd $2, %e[[R0]]x, %[[X1]]
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; CHECK-NEXT: pinsrd $2, %e[[R0]]x, %[[X1]]
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; CHECK-NEXT: pextrd $3, %[[X0]], %e[[R0:[abcd]]]x
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; CHECK-NEXT: pextrd $3, %[[X0]], %e[[R0:[abcd]]]x
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; CHECK-NEXT: pinsrd $3, %e[[R0]]x, %[[X1]]
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; CHECK-NEXT: pinsrd $3, %e[[R0]]x, %[[X1]]
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; CHECK-NEXT: movdqa %[[X1]], %[[X2:xmm[0-9]+]]
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; CHECK-NEXT: pshufb %[[SHUFFLE_MASK]], %[[X2]]
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; CHECK-NEXT: pmovzxwq %[[X2]], %[[X3:xmm[0-9]+]]
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; CHECK-NEXT: pextrb $8, %[[X1]], 2(%{{.*}})
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; CHECK-NEXT: pextrb $8, %[[X1]], 2(%{{.*}})
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; CHECK-NEXT: pshufb %[[SHUFFLE_MASK]], %[[X1]]
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; CHECK-NEXT: pmovzxwq %[[X1]], %[[X3:xmm[0-9]+]]
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; CHECK-NEXT: movd %[[X3]], %e[[R0:[abcd]]]x
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; CHECK-NEXT: movd %[[X3]], %e[[R0:[abcd]]]x
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; CHECK-NEXT: movw %[[R0]]x, (%{{.*}})
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; CHECK-NEXT: movw %[[R0]]x, (%{{.*}})
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