From 5a18ebc70cadd844167b3e39e7a7a627901ab529 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Mon, 21 May 2007 18:56:31 +0000
Subject: [PATCH] BlockHasNoFallThrough() now returns true if block ends with a
return instruction; AnalyzeBranch() should ignore predicated instructionsd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37268 91177308-0d34-0410-b5e6-96231b3b80d8
---
lib/Target/ARM/ARMInstrInfo.cpp | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index 5f5806d27d2..78f8de4d6d7 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -298,6 +298,11 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
return NewMIs[0];
}
+static bool isPredicated(MachineInstr *MI) {
+ MachineOperand *PMO = MI->findFirstPredOperand();
+ return PMO && PMO->getImmedValue() != ARMCC::AL;
+}
+
// Branch analysis.
bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
@@ -312,7 +317,8 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
// If there is only one terminator instruction, process it.
unsigned LastOpc = LastInst->getOpcode();
- if (I == MBB.begin() || !isTerminatorInstr((--I)->getOpcode())) {
+ if (I == MBB.begin() ||
+ isPredicated(--I) || !isTerminatorInstr(I->getOpcode())) {
if (LastOpc == ARM::B || LastOpc == ARM::tB) {
TBB = LastInst->getOperand(0).getMachineBasicBlock();
return false;
@@ -331,7 +337,7 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
// If there are three terminators, we don't know what sort of block this is.
if (SecondLastInst && I != MBB.begin() &&
- isTerminatorInstr((--I)->getOpcode()))
+ !isPredicated(--I) && isTerminatorInstr(I->getOpcode()))
return true;
// If the block ends with ARM::B/ARM::tB and a ARM::Bcc/ARM::tBcc, handle it.
@@ -407,6 +413,11 @@ bool ARMInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const {
if (MBB.empty()) return false;
switch (MBB.back().getOpcode()) {
+ case ARM::BX_RET: // Return.
+ case ARM::LDM_RET:
+ case ARM::tBX_RET:
+ case ARM::tBX_RET_vararg:
+ case ARM::tPOP_RET:
case ARM::B:
case ARM::tB: // Uncond branch.
case ARM::tBR_JTr: