6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-03 14:08:57 +00:00
Code Issues Projects Releases Wiki Activity

Another tweak to X86 instructions to add the missing flex instruction (without

Browse Source 
the wait prefix).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kevin Enderby 2010-10-27 02:53:04 +00:00
parent f4630ecc3f
commit 5a378076a4
2 changed files with 10 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -1196,7 +1196,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
// FIXME: This should be replaced with a real .td file alias mechanism.
if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw" ||
Op->getToken() == "finit" || Op->getToken() == "fsave" ||
Op->getToken() == "fstenv") {
Op->getToken() == "fstenv" || Op->getToken() == "fclex") {
MCInst Inst;
Inst.setOpcode(X86::WAIT);
Out.EmitInstruction(Inst);
@ -1208,6 +1208,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
.Case("fstcw", "fnstcw")
.Case("fstenv", "fnstenv")
.Case("fstsw", "fnstsw")
.Case("fclex", "fnclex")
.Default(0);
assert(Repl && "Unknown wait-prefixed instruction");
delete Operands[0];

8
test/MC/X86/x86-32.s
View File

@ -774,3 +774,11 @@ pshufw $90, %mm4, %mm0
// CHECK: verr 32493
// CHECK: encoding: [0x0f,0x00,0x25,0xed,0x7e,0x00,0x00]
verr 0x7eed
// CHECK: wait
// CHECK: encoding: [0x9b]
fclex
// CHECK: fnclex
// CHECK: encoding: [0xdb,0xe2]
fnclex