From 5a4552ca4256461f402f9d7d2511e77c79316907 Mon Sep 17 00:00:00 2001 From: Nadav Rotem Date: Fri, 11 Feb 2011 19:20:37 +0000 Subject: [PATCH] Fix #9190 The bug happens when the DAGCombiner attempts to optimize one of the patterns of the SUB opcode. It tries to create a zero of type v2i64. This type is legal on 32bit machines, but the initializer of this vector (i64) is target dependent. Currently, the initializer attempts to create an i64 zero constant, which fails. Added a flag to tell the DAGCombiner to create a legal zero, if we require that the pass would generate legal types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125391 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index dd7d56ab9d2..1851e17187f 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1533,7 +1533,7 @@ SDValue DAGCombiner::visitSUB(SDNode *N) { // fold (sub x, x) -> 0 if (N0 == N1) - return DAG.getConstant(0, N->getValueType(0)); + return DAG.getConstant(0, N->getValueType(0), LegalTypes); // fold (sub c1, c2) -> c1-c2 if (N0C && N1C) return DAG.FoldConstantArithmetic(ISD::SUB, VT, N0C, N1C);