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Remove aligned/unaligned load/store fragments defined in MipsInstrInfo.td and
use load/store fragments defined in TargetSelectionDAG.td in place of them. Unaligned loads/stores are either expanded or lowered to target-specific nodes, so instruction selection should see only aligned load/store nodes. No changes in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163960 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -218,15 +218,9 @@ unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
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return getMipsRegisterNumbering(MO.getReg());
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else if (MO.isImm())
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return static_cast<unsigned>(MO.getImm());
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else if (MO.isGlobal()) {
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if (MI.getOpcode() == Mips::ULW || MI.getOpcode() == Mips::USW ||
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MI.getOpcode() == Mips::ULH || MI.getOpcode() == Mips::ULHu)
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emitGlobalAddressUnaligned(MO.getGlobal(), getRelocation(MI, MO), 4);
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else if (MI.getOpcode() == Mips::USH)
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emitGlobalAddressUnaligned(MO.getGlobal(), getRelocation(MI, MO), 8);
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else
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emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
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} else if (MO.isSymbol())
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else if (MO.isGlobal())
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emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
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else if (MO.isSymbol())
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emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
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else if (MO.isCPI())
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emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
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@ -383,29 +377,8 @@ void MipsCodeEmitter::emitInstruction(const MachineInstr &MI) {
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if ((MI.getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo)
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return;
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switch (MI.getOpcode()) {
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case Mips::USW:
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NumEmitted += emitUSW(MI);
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break;
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case Mips::ULW:
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NumEmitted += emitULW(MI);
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break;
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case Mips::ULH:
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NumEmitted += emitULH(MI);
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break;
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case Mips::ULHu:
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NumEmitted += emitULHu(MI);
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break;
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case Mips::USH:
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NumEmitted += emitUSH(MI);
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break;
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default:
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emitWordLE(getBinaryCodeForInstr(MI));
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++NumEmitted; // Keep track of the # of mi's emitted
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break;
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}
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emitWordLE(getBinaryCodeForInstr(MI));
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++NumEmitted; // Keep track of the # of mi's emitted
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MCE.processDebugLoc(MI.getDebugLoc(), false);
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}
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