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Each instruction now has both an ImmType and a MemType. This describes

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the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11967 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alkis Evlogimenos
2004-02-28 22:02:05 +00:00
parent f822ee999f
commit 5ab29b504d
6 changed files with 548 additions and 506 deletions
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32
lib/Target/X86/X86InstrInfo.h
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@@ -111,21 +111,29 @@ namespace X86II {
//===------------------------------------------------------------------===//
// This three-bit field describes the size of a memory operand. Zero is
// unused so that we can tell if we forgot to set a value.
ArgShift = 10,
ArgMask = 7 << ArgShift,
Arg8 = 1 << ArgShift,
Arg16 = 2 << ArgShift,
Arg32 = 3 << ArgShift,
Arg64 = 4 << ArgShift, // 64 bit int argument for FILD64
ArgF32 = 5 << ArgShift,
ArgF64 = 6 << ArgShift,
ArgF80 = 7 << ArgShift,
MemShift = 10,
MemMask = 7 << MemShift,
Mem8 = 1 << MemShift,
Mem16 = 2 << MemShift,
Mem32 = 3 << MemShift,
Mem64 = 4 << MemShift,
Mem80 = 5 << MemShift,
Mem128 = 6 << MemShift,
//===------------------------------------------------------------------===//
// This tow-bit field describes the size of an immediate operand. Zero is
// unused so that we can tell if we forgot to set a value.
ImmShift = 13,
ImmMask = 7 << ImmShift,
Imm8 = 1 << ImmShift,
Imm16 = 2 << ImmShift,
Imm32 = 3 << ImmShift,
//===------------------------------------------------------------------===//
// FP Instruction Classification... Zero is non-fp instruction.
// FPTypeMask - Mask for all of the FP types...
FPTypeShift = 13,
FPTypeShift = 15,
FPTypeMask = 7 << FPTypeShift,
// NotFP - The default, set for instructions that do not use FP registers.
@@ -151,9 +159,9 @@ namespace X86II {
SpecialFP = 5 << FPTypeShift,
// PrintImplUses - Print out implicit uses in the assembly output.
PrintImplUses = 1 << 16,
PrintImplUses = 1 << 18,
OpcodeShift = 17,
OpcodeShift = 19,
OpcodeMask = 0xFF << OpcodeShift,
// Bits 25 -> 31 are unused
};