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Bug fix: Need to include the stack offset "bias" in assembly code itself.
Added class UltraSparcCacheInfo. Added function to convert float to int by copying via memory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1224 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -16,8 +16,9 @@
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#include "SparcRegClassInfo.h"
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#include "SparcRegClassInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MachineInstrInfo.h"
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#include "llvm/Target/MachineInstrInfo.h"
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#include "llvm/Target/MachineFrameInfo.h"
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#include "llvm/Target/MachineSchedInfo.h"
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#include "llvm/Target/MachineSchedInfo.h"
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#include "llvm/Target/MachineFrameInfo.h"
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#include "llvm/Target/MachineCacheInfo.h"
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#include "llvm/CodeGen/RegClass.h"
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#include "llvm/CodeGen/RegClass.h"
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#include "llvm/Type.h"
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#include "llvm/Type.h"
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@ -115,9 +116,9 @@ public:
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vector<TmpInstruction*>& tempVec) const;
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vector<TmpInstruction*>& tempVec) const;
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// Create an instruction sequence to copy an integer value `val' from an
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// Create an instruction sequence to copy an integer value `val'
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// integer to a floating point register `dest'. val must be an integral
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// to a floating point value `dest' by copying to memory and back.
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// type. dest must be a Float or Double.
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// val must be an integral type. dest must be a Float or Double.
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// The generated instructions are returned in `minstrVec'.
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// The generated instructions are returned in `minstrVec'.
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// Any temp. registers (TmpInstruction) created are returned in `tempVec'.
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// Any temp. registers (TmpInstruction) created are returned in `tempVec'.
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//
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//
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@ -127,6 +128,17 @@ public:
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vector<MachineInstr*>& minstrVec,
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vector<MachineInstr*>& minstrVec,
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vector<TmpInstruction*>& tempVec,
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vector<TmpInstruction*>& tempVec,
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TargetMachine& target) const;
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TargetMachine& target) const;
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// Similarly, create an instruction sequence to copy an FP value
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// `val' to an integer value `dest' by copying to memory and back.
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// See the previous function for information about return values.
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//
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virtual void CreateCodeToCopyFloatToInt(Method* method,
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Value* val,
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Instruction* dest,
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vector<MachineInstr*>& minstrVec,
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vector<TmpInstruction*>& tempVec,
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TargetMachine& target) const;
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};
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};
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@ -1229,17 +1241,34 @@ public:
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}
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}
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private:
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private:
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// All stack addresses must be offset by 0x7ff (2047) on Sparc V9.
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static const int OFFSET = (int) 0x7ff;
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static const int StackFrameSizeAlignment = 16;
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static const int StackFrameSizeAlignment = 16;
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static const int MinStackFrameSize = 176;
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static const int MinStackFrameSize = 176;
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static const int NumFixedOutgoingArgs = 6;
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static const int NumFixedOutgoingArgs = 6;
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static const int SizeOfEachArgOnStack = 8;
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static const int SizeOfEachArgOnStack = 8;
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static const int StaticAreaOffsetFromFP = -1;
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static const int StaticAreaOffsetFromFP = -1 + OFFSET;
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static const int FirstIncomingArgOffsetFromFP = 126;
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static const int FirstIncomingArgOffsetFromFP = 128 + OFFSET;
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static const int FirstOutgoingArgOffsetFromSP = 128;
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static const int FirstOptionalIncomingArgOffsetFromFP = 176 + OFFSET;
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static const int FirstOptionalOutgoingArgOffsetFromSP = 176;
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static const int FirstOutgoingArgOffsetFromSP = 128 + OFFSET;
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static const int FirstOptionalOutgoingArgOffsetFromSP = 176 + OFFSET;
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};
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};
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//---------------------------------------------------------------------------
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// class UltraSparcCacheInfo
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//
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// Purpose:
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// Interface to cache parameters for the UltraSPARC.
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// Just use defaults for now.
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//---------------------------------------------------------------------------
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class UltraSparcCacheInfo: public MachineCacheInfo {
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public:
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/*ctor*/ UltraSparcCacheInfo (const TargetMachine& target) :
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MachineCacheInfo(target) {}
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};
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// class UltraSparcMachine
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// class UltraSparcMachine
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@ -1257,6 +1286,7 @@ private:
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UltraSparcSchedInfo schedInfo;
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UltraSparcSchedInfo schedInfo;
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UltraSparcRegInfo regInfo;
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UltraSparcRegInfo regInfo;
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UltraSparcFrameInfo frameInfo;
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UltraSparcFrameInfo frameInfo;
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UltraSparcCacheInfo cacheInfo;
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public:
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public:
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UltraSparc();
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UltraSparc();
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virtual ~UltraSparc() {}
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virtual ~UltraSparc() {}
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@ -1265,6 +1295,7 @@ public:
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virtual const MachineSchedInfo &getSchedInfo() const { return schedInfo; }
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virtual const MachineSchedInfo &getSchedInfo() const { return schedInfo; }
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virtual const MachineRegInfo &getRegInfo() const { return regInfo; }
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virtual const MachineRegInfo &getRegInfo() const { return regInfo; }
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virtual const MachineFrameInfo &getFrameInfo() const { return frameInfo; }
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virtual const MachineFrameInfo &getFrameInfo() const { return frameInfo; }
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virtual const MachineCacheInfo &getCacheInfo() const { return cacheInfo; }
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// compileMethod - For the sparc, we do instruction selection, followed by
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// compileMethod - For the sparc, we do instruction selection, followed by
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// delay slot scheduling, then register allocation.
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// delay slot scheduling, then register allocation.
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