6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-05 13:26:55 +00:00
Code Issues Projects Releases Wiki Activity

Modify how the formulae are rated in Loop Strength Reduce.

Browse Source 
Namely, check if the target allows to fold more that one register in the
addressing mode and if yes, adjust the cost accordingly.

Prior to this commit, reg1 + scale * reg2 accesses were artificially preferred
to reg1 + reg2 accesses. Indeed, the cost model wrongly assumed that reg1 + reg2
needs a temporary register for the computation, whereas it was correctly
estimated for reg1 + scale * reg2.

<rdar://problem/13973908>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183021 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Quentin Colombet
2013-05-31 17:20:29 +00:00
parent bed2308186
commit 5b00f4edcb
4 changed files with 109 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
test/CodeGen/X86/masked-iv-safe.ll
View File

@@ -3,9 +3,8 @@
; RUN: not grep movz %t
; RUN: not grep sar %t
; RUN: not grep shl %t
; RUN: grep add %t | count 1
; RUN: grep inc %t | count 4
; RUN: grep dec %t | count 2
; RUN: grep add %t | count 5
; RUN: grep inc %t | count 2
; RUN: grep lea %t | count 3
; Optimize away zext-inreg and sext-inreg on the loop induction