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X86: allow registers 8-15 in test

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This test was failing on some hosts when an unexpected register was used for a
variable. This just extends the regexp to allow the new x86-64 registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182929 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2013-05-30 13:56:32 +00:00
parent 15983b80a0
commit 5b1552548a
1 changed files with 3 additions and 3 deletions
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6
test/CodeGen/X86/zext-sext.ll
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@ -33,9 +33,9 @@ entry:
%tmp11 = sext i32 %tmp4 to i64
%tmp12 = add i64 %tmp11, 5089792279245435153
; CHECK: addl $2138875574, %e[[REGISTER_zext:[a-z]+]]
; CHECK-NEXT: movslq %e[[REGISTER_zext]], [[REGISTER_tmp:%[a-z]+]]
; CHECK: movq [[REGISTER_tmp]], [[REGISTER_sext:%[a-z]+]]
; CHECK: addl $2138875574, %e[[REGISTER_zext:[a-z0-9]+]]
; CHECK-NEXT: movslq %e[[REGISTER_zext]], [[REGISTER_tmp:%r[a-z0-9]+]]
; CHECK: movq [[REGISTER_tmp]], [[REGISTER_sext:%r[a-z0-9]+]]
; CHECK-NEXT: subq %r[[REGISTER_zext]], [[REGISTER_sext]]
%tmp13 = sub i64 %tmp12, 2138875574