From 5b2103405b55c8b9960d28f59df27040db39813f Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Wed, 15 Dec 2004 07:04:32 +0000
Subject: [PATCH] Move virtual method call out of loop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18955 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/RegAllocIterativeScan.cpp | 8 ++++----
 lib/CodeGen/RegAllocLinearScan.cpp    | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/CodeGen/RegAllocIterativeScan.cpp b/lib/CodeGen/RegAllocIterativeScan.cpp
index e5f7be73366..d523906392e 100644
--- a/lib/CodeGen/RegAllocIterativeScan.cpp
+++ b/lib/CodeGen/RegAllocIterativeScan.cpp
@@ -397,8 +397,8 @@ void RA::assignRegOrSpillAtInterval(IntervalPtrs::value_type cur)
   float minWeight = HUGE_VAL;
   unsigned minReg = 0;
   const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
-  for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
-       i != rc->allocation_order_end(*mf_); ++i) {
+  for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_),
+       e = rc->allocation_order_end(*mf_); i != e; ++i) {
     unsigned reg = *i;
     if (minWeight > spillWeights_[reg]) {
       minWeight = spillWeights_[reg];
@@ -477,8 +477,8 @@ unsigned RA::getFreePhysReg(LiveInterval* cur)
   const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
 
   unsigned freeReg = 0;
-  for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
-       i != rc->allocation_order_end(*mf_); ++i) {
+  for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_),
+       e = rc->allocation_order_end(*mf_); i != e; ++i) {
     unsigned reg = *i;
     if (prt_->isRegAvail(reg) &&
         (!freeReg || inactiveCounts[freeReg] < inactiveCounts[reg]))
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 140846fe01e..2b389117e7e 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -426,8 +426,8 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
   float minWeight = HUGE_VAL;
   unsigned minReg = 0;
   const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
-  for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_);
-       i != rc->allocation_order_end(*mf_); ++i) {
+  for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_),
+       e = rc->allocation_order_end(*mf_); i != e; ++i) {
     unsigned reg = *i;
     if (minWeight > SpillWeights[reg]) {
       minWeight = SpillWeights[reg];