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Tests: Be less dependent on a specific schedule/regalloc

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192454 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun
2013-10-11 15:40:12 +00:00
parent 21d60f02c3
commit 5b51fd5b55
10 changed files with 53 additions and 55 deletions
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10
test/CodeGen/ARM/select.ll
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@@ -58,8 +58,8 @@ entry:
define double @f7(double %a, double %b) {
;CHECK-LABEL: f7:
;CHECK: movlt
;CHECK: movge
;CHECK-DAG: movlt
;CHECK-DAG: movge
;CHECK-VFP-LABEL: f7:
;CHECK-VFP: vmovmi
%tmp = fcmp olt double %a, 1.234e+00
@@ -76,9 +76,9 @@ define double @f7(double %a, double %b) {
; block generated, odds are good that we have close to the ideal code for this:
;
; CHECK-NEON-LABEL: f8:
; CHECK-NEON: movw [[R3:r[0-9]+]], #1123
; CHECK-NEON: adr [[R2:r[0-9]+]], LCPI7_0
; CHECK-NEON-NEXT: cmp r0, [[R3]]
; CHECK-NEON-DAG: movw [[R3:r[0-9]+]], #1123
; CHECK-NEON-DAG: adr [[R2:r[0-9]+]], LCPI7_0
; CHECK-NEON: cmp r0, [[R3]]
; CHECK-NEON-NEXT: it eq
; CHECK-NEON-NEXT: addeq{{.*}} [[R2]], #4
; CHECK-NEON-NEXT: ldr