6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-02 22:04:55 +00:00
Code Issues Projects Releases Wiki Activity

Fix a minor logic mistake transforming compares in instcombine. PR12514.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156600 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2012-05-11 01:32:59 +00:00
parent 247c5ab07c
commit 5b6dfee28e
2 changed files with 16 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -1035,7 +1035,7 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
if ((KnownZero|KnownOne).countLeadingOnes() >= SrcBits-DstBits) {
// Pull in the high bits from known-ones set.
APInt NewRHS = RHS->getValue().zext(SrcBits);
NewRHS |= KnownOne;
NewRHS |= KnownOne & APInt::getHighBitsSet(SrcBits, SrcBits-DstBits);
return new ICmpInst(ICI.getPredicate(), LHSI->getOperand(0),
ConstantInt::get(ICI.getContext(), NewRHS));
}

15
test/Transforms/InstCombine/cast.ll
View File

@ -679,3 +679,18 @@ define i64 @test_mmx_const(<2 x i32> %c) nounwind {
; CHECK: @test_mmx_const
; CHECK-NOT: x86_mmx
}
; PR12514
define i1 @test67(i1 %a, i32 %b) {
%tmp2 = zext i1 %a to i32
%conv6 = xor i32 %tmp2, 1
%and = and i32 %b, %conv6
%sext = shl nuw nsw i32 %and, 24
%neg.i = xor i32 %sext, -16777216
%conv.i.i = ashr exact i32 %neg.i, 24
%trunc = trunc i32 %conv.i.i to i8
%tobool.i = icmp eq i8 %trunc, 0
ret i1 %tobool.i
; CHECK: @test67
; CHECK: ret i1 false
}