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Code cleanups: Remove duplicated logic in PromotInteRes_BITCAST, reserve vector space, reuse types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133389 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -192,10 +192,6 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
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if (NOutVT.bitsEq(NInVT))
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if (NOutVT.bitsEq(NInVT))
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// The input promotes to the same size. Convert the promoted value.
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// The input promotes to the same size. Convert the promoted value.
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return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp));
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return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp));
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if (NInVT.isVector())
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// Promote vector element via memory load/store.
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return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
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CreateStackStoreLoad(InOp, OutVT));
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break;
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break;
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case TargetLowering::TypeSoftenFloat:
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case TargetLowering::TypeSoftenFloat:
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// Promote the integer operand by hand.
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// Promote the integer operand by hand.
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@@ -2729,13 +2725,14 @@ SDValue DAGTypeLegalizer::PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N) {
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EVT OutVT = N->getValueType(0);
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EVT OutVT = N->getValueType(0);
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EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
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EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
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assert(NOutVT.isVector() && "This type must be promoted to a vector type");
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assert(NOutVT.isVector() && "This type must be promoted to a vector type");
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unsigned OutNumElems = N->getValueType(0).getVectorNumElements();
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unsigned OutNumElems = OutVT.getVectorNumElements();
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EVT NOutVTElem = NOutVT.getVectorElementType();
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EVT NOutVTElem = NOutVT.getVectorElementType();
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DebugLoc dl = N->getDebugLoc();
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DebugLoc dl = N->getDebugLoc();
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SDValue BaseIdx = N->getOperand(1);
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SDValue BaseIdx = N->getOperand(1);
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SmallVector<SDValue, 8> Ops;
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SmallVector<SDValue, 8> Ops;
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Ops.reserve(OutNumElems);
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for (unsigned i = 0; i != OutNumElems; ++i) {
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for (unsigned i = 0; i != OutNumElems; ++i) {
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// Extract the element from the original vector.
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// Extract the element from the original vector.
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@@ -2767,9 +2764,9 @@ SDValue DAGTypeLegalizer::PromoteIntRes_VECTOR_SHUFFLE(SDNode *N) {
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SDValue V0 = GetPromotedInteger(N->getOperand(0));
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SDValue V0 = GetPromotedInteger(N->getOperand(0));
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SDValue V1 = GetPromotedInteger(N->getOperand(1));
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SDValue V1 = GetPromotedInteger(N->getOperand(1));
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EVT OutVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
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EVT OutVT = V0.getValueType();
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return DAG.getVectorShuffle(OutVT, dl, V0,V1, &NewMask[0]);
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return DAG.getVectorShuffle(OutVT, dl, V0, V1, &NewMask[0]);
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}
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}
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@@ -2783,6 +2780,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR(SDNode *N) {
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DebugLoc dl = N->getDebugLoc();
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DebugLoc dl = N->getDebugLoc();
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SmallVector<SDValue, 8> Ops;
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SmallVector<SDValue, 8> Ops;
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Ops.reserve(NumElems);
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for (unsigned i = 0; i != NumElems; ++i) {
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for (unsigned i = 0; i != NumElems; ++i) {
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SDValue Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i));
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SDValue Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i));
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Ops.push_back(Op);
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Ops.push_back(Op);
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