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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-27 15:29:51 +00:00
Remove trailing whitespace and some tab characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187472 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -50,7 +50,7 @@ void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
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// Try to print any aliases first.
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// Try to print any aliases first.
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if (!printAliasInstr(MI, OS))
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if (!printAliasInstr(MI, OS))
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printInstruction(MI, OS);
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printInstruction(MI, OS);
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// Next always print the annotation.
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// Next always print the annotation.
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printAnnotation(OS, Annot);
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printAnnotation(OS, Annot);
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@ -159,10 +159,10 @@ void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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O << markup("<imm:")
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O << markup("<imm:")
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<< '$' << formatImm((int64_t)Op.getImm())
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<< '$' << formatImm((int64_t)Op.getImm())
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<< markup(">");
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<< markup(">");
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if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256))
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if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256))
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*CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Op.getImm());
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*CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Op.getImm());
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} else {
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} else {
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assert(Op.isExpr() && "unknown operand kind in printOperand");
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assert(Op.isExpr() && "unknown operand kind in printOperand");
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O << markup("<imm:")
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O << markup("<imm:")
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@ -177,7 +177,7 @@ void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
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const MCOperand &IndexReg = MI->getOperand(Op+2);
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const MCOperand &IndexReg = MI->getOperand(Op+2);
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const MCOperand &DispSpec = MI->getOperand(Op+3);
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const MCOperand &DispSpec = MI->getOperand(Op+3);
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const MCOperand &SegReg = MI->getOperand(Op+4);
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const MCOperand &SegReg = MI->getOperand(Op+4);
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O << markup("<mem:");
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O << markup("<mem:");
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// If this has a segment register, print it.
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// If this has a segment register, print it.
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@ -185,7 +185,7 @@ void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
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printOperand(MI, Op+4, O);
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printOperand(MI, Op+4, O);
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O << ':';
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O << ':';
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}
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}
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if (DispSpec.isImm()) {
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if (DispSpec.isImm()) {
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int64_t DispVal = DispSpec.getImm();
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int64_t DispVal = DispSpec.getImm();
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
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@ -194,21 +194,21 @@ void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
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assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
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assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
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O << *DispSpec.getExpr();
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O << *DispSpec.getExpr();
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}
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}
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if (IndexReg.getReg() || BaseReg.getReg()) {
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if (IndexReg.getReg() || BaseReg.getReg()) {
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O << '(';
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O << '(';
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if (BaseReg.getReg())
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if (BaseReg.getReg())
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printOperand(MI, Op, O);
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printOperand(MI, Op, O);
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if (IndexReg.getReg()) {
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if (IndexReg.getReg()) {
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O << ',';
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O << ',';
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printOperand(MI, Op+2, O);
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printOperand(MI, Op+2, O);
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unsigned ScaleVal = MI->getOperand(Op+1).getImm();
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unsigned ScaleVal = MI->getOperand(Op+1).getImm();
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if (ScaleVal != 1) {
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if (ScaleVal != 1) {
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O << ','
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O << ','
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<< markup("<imm:")
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<< markup("<imm:")
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<< ScaleVal // never printed in hex.
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<< ScaleVal // never printed in hex.
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<< markup(">");
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<< markup(">");
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}
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}
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}
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}
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O << ')';
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O << ')';
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