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ARM: add @llvm.arm.space intrinsic for testing ConstantIslands.

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Creating tests for the ConstantIslands pass is very difficult, since it depends
on precise layout details. Having the ability to precisely inject a number of
bytes into the stream helps greatly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221903 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-11-13 17:58:48 +00:00
parent bb11e56168
commit 5bd311bf17
5 changed files with 34 additions and 0 deletions
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5
include/llvm/IR/IntrinsicsARM.td
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@ -20,6 +20,11 @@ let TargetPrefix = "arm" in { // All intrinsics start with "llvm.arm.".
def int_arm_thread_pointer : GCCBuiltin<"__builtin_thread_pointer">,
Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
// A space-consuming intrinsic primarily for testing ARMConstantIslands. The
// first argument is the number of bytes this "instruction" takes up, the second
// and return value are essentially chains, used to force ordering during ISel.
def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
//===----------------------------------------------------------------------===//
// Saturating Arithmetic

3
lib/Target/ARM/ARMAsmPrinter.cpp
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@ -1592,6 +1592,9 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
EmitJumpTable(MI);
return;
}
case ARM::SPACE:
OutStreamer.EmitZeros(MI->getOperand(1).getImm());
return;
case ARM::TRAP: {
// Non-Darwin binutils don't yet support the "trap" mnemonic.
// FIXME: Remove this special case when they do.

2
lib/Target/ARM/ARMBaseInstrInfo.cpp
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@ -674,6 +674,8 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
++NumEntries;
return NumEntries * EntrySize + InstSize;
}
case ARM::SPACE:
return MI->getOperand(1).getImm();
}
}

5
lib/Target/ARM/ARMInstrInfo.td
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@ -5621,3 +5621,8 @@ def : InstAlias<"umull${s}${p} $RdLo, $RdHi, $Rn, $Rm",
// is discarded.
def ITasm : ARMAsmPseudo<"it$mask $cc", (ins it_pred:$cc, it_mask:$mask)>,
ComplexDeprecationPredicate<"IT">;
let mayLoad = 1, mayStore =1, hasSideEffects = 1 in
def SPACE : PseudoInst<(outs GPR:$Rd), (ins i32imm:$size, GPR:$Rn),
NoItinerary,
[(set GPR:$Rd, (int_arm_space imm:$size, GPR:$Rn))]>;

19
test/CodeGen/ARM/space-directive.ll Normal file
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@ -0,0 +1,19 @@
; RUN: llc -mtriple=armv7 -o - %s | FileCheck %s
define i32 @test_space() minsize {
; CHECK-LABEL: test_space:
; CHECK: ldr {{r[0-9]+}}, [[CPENTRY:.?LCPI[0-9]+_[0-9]+]]
; CHECK: b [[PAST_CP:.?LBB[0-9]+_[0-9]+]]
; CHECK: [[CPENTRY]]:
; CHECK-NEXT: 12345678
; CHECK: [[PAST_CP]]:
; CHECK: .zero 10000
%addr = inttoptr i32 12345678 to i32*
%val = load i32* %addr
call i32 @llvm.arm.space(i32 10000, i32 undef)
ret i32 %val
}
declare i32 @llvm.arm.space(i32, i32)