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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-26 07:29:55 +00:00
Lower TLS_addr32 and TLS_addr64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120225 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -9922,6 +9922,44 @@ X86TargetLowering::EmitLoweredTLSCall(MachineInstr *MI,
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return BB;
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}
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MachineBasicBlock *
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X86TargetLowering::emitLoweredTLSAddr(MachineInstr *MI,
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MachineBasicBlock *BB) const {
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const X86InstrInfo *TII
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= static_cast<const X86InstrInfo*>(getTargetMachine().getInstrInfo());
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DebugLoc DL = MI->getDebugLoc();
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if (Subtarget->is64Bit()) {
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BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX));
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MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(X86::LEA64r),
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X86::RDI);
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X86AddressMode Addr;
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Addr.GV = MI->getOperand(3).getGlobal();
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Addr.GVOpFlags = MI->getOperand(3).getTargetFlags();
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Addr.Base.Reg = X86::RIP;
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addFullAddress(MIB, Addr);
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BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX));
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BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX));
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BuildMI(*BB, MI, DL, TII->get(X86::REX64_PREFIX));
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BuildMI(*BB, MI, DL, TII->get(X86::CALL64pcrel32))
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.addExternalSymbol("__tls_get_addr", X86II::MO_PLT)
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.addReg(X86::RDI, RegState::Implicit);
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} else {
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MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(X86::LEA32r),
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X86::EAX);
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X86AddressMode Addr;
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Addr.GV = MI->getOperand(3).getGlobal();
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Addr.GVOpFlags = MI->getOperand(3).getTargetFlags();
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Addr.IndexReg = X86::EBX;
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addFullAddress(MIB, Addr);
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BuildMI(*BB, MI, DL, TII->get(X86::CALLpcrel32))
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.addExternalSymbol("___tls_get_addr", X86II::MO_PLT)
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.addReg(X86::EAX, RegState::Implicit);
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}
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MI->eraseFromParent(); // The pseudo instruction is gone now.
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return BB;
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}
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MachineBasicBlock *
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X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock *BB) const {
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@ -9932,6 +9970,9 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
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case X86::TLSCall_32:
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case X86::TLSCall_64:
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return EmitLoweredTLSCall(MI, BB);
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case X86::TLS_addr32:
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case X86::TLS_addr64:
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return emitLoweredTLSAddr(MI, BB);
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case X86::CMOV_GR8:
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case X86::CMOV_FR32:
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case X86::CMOV_FR64:
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@ -871,6 +871,9 @@ namespace llvm {
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MachineBasicBlock *EmitLoweredTLSCall(MachineInstr *MI,
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MachineBasicBlock *BB) const;
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MachineBasicBlock *emitLoweredTLSAddr(MachineInstr *MI,
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MachineBasicBlock *BB) const;
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/// Emit nodes that will be selected as "test Op0,Op0", or something
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/// equivalent, for use with the given x86 condition code.
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SDValue EmitTest(SDValue Op0, unsigned X86CC, SelectionDAG &DAG) const;
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@ -242,10 +242,10 @@ let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
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MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
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XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS],
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Uses = [ESP] in
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Uses = [ESP],
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usesCustomInserter = 1 in
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def TLS_addr32 : I<0, Pseudo, (outs), (ins i32mem:$sym),
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"leal\t$sym, %eax; "
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"call\t___tls_get_addr@PLT",
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"# TLS_addr32",
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[(X86tlsaddr tls32addr:$sym)]>,
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Requires<[In32BitMode]>;
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@ -257,13 +257,10 @@ let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
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MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
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XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS],
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Uses = [RSP] in
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Uses = [RSP],
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usesCustomInserter = 1 in
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def TLS_addr64 : I<0, Pseudo, (outs), (ins i64mem:$sym),
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".byte\t0x66; "
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"leaq\t$sym(%rip), %rdi; "
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".word\t0x6666; "
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"rex64; "
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"call\t__tls_get_addr@PLT",
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"# TLS_addr64",
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[(X86tlsaddr tls64addr:$sym)]>,
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Requires<[In64BitMode]>;
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@ -1,5 +1,6 @@
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; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -relocation-model=pic > %t2
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; RUN: grep {leaq.*TLSGD.*__tls_get_addr} %t2
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; RUN: grep {leaq.*TLSGD} %t2
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; RUN; grep {__tls_get_addr} %t2
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; PR4004
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@i = thread_local global i32 15
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@ -21,7 +21,7 @@ define void @leaf() nounwind {
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; CHECK: leaf:
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; CHECK-NOT: -8(%rsp)
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; CHECK: leaq link_ptr@TLSGD
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; CHECK: call __tls_get_addr@PLT
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; CHECK: callq __tls_get_addr@PLT
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"file foo2.c, line 14, bb1":
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%p = alloca %test*, align 8 ; <%test**> [#uses=4]
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br label %"file foo2.c, line 14, bb2"
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@ -11,11 +11,11 @@ entry:
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; X32: f1:
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; X32: leal i@TLSGD(,%ebx), %eax
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; X32: call ___tls_get_addr@PLT
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; X32: calll ___tls_get_addr@PLT
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; X64: f1:
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; X64: leaq i@TLSGD(%rip), %rdi
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; X64: call __tls_get_addr@PLT
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; X64: callq __tls_get_addr@PLT
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@i2 = external thread_local global i32
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@ -27,11 +27,11 @@ entry:
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; X32: f2:
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; X32: leal i@TLSGD(,%ebx), %eax
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; X32: call ___tls_get_addr@PLT
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; X32: calll ___tls_get_addr@PLT
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; X64: f2:
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; X64: leaq i@TLSGD(%rip), %rdi
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; X64: call __tls_get_addr@PLT
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; X64: callq __tls_get_addr@PLT
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@ -43,11 +43,11 @@ entry:
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; X32: f3:
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; X32: leal i@TLSGD(,%ebx), %eax
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; X32: call ___tls_get_addr@PLT
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; X32: calll ___tls_get_addr@PLT
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; X64: f3:
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; X64: leaq i@TLSGD(%rip), %rdi
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; X64: call __tls_get_addr@PLT
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; X64: callq __tls_get_addr@PLT
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define i32* @f4() nounwind {
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@ -57,11 +57,11 @@ entry:
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; X32: f4:
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; X32: leal i@TLSGD(,%ebx), %eax
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; X32: call ___tls_get_addr@PLT
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; X32: calll ___tls_get_addr@PLT
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; X64: f4:
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; X64: leaq i@TLSGD(%rip), %rdi
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; X64: call __tls_get_addr@PLT
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; X64: callq __tls_get_addr@PLT
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