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This is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42785 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -10,36 +10,6 @@ http://softwarecommunity.intel.com/isn/Downloads/Intel%20SSE4%20Programming%20Re
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//===---------------------------------------------------------------------===//
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Add a MUL2U and MUL2S nodes to represent a multiply that returns both the
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Hi and Lo parts (combination of MUL and MULH[SU] into one node). Add this to
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X86, & make the dag combiner produce it when needed. This will eliminate one
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imul from the code generated for:
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long long test(long long X, long long Y) { return X*Y; }
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by using the EAX result from the mul. We should add a similar node for
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DIVREM.
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another case is:
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long long test(int X, int Y) { return (long long)X*Y; }
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... which should only be one imul instruction.
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or:
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unsigned long long int t2(unsigned int a, unsigned int b) {
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return (unsigned long long)a * b;
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}
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... which should be one mul instruction.
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This can be done with a custom expander, but it would be nice to move this to
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generic code.
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//===---------------------------------------------------------------------===//
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CodeGen/X86/lea-3.ll:test3 should be a single LEA, not a shift/move. The X86
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backend knows how to three-addressify this shift, but it appears the register
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allocator isn't even asking it to do so in this case. We should investigate
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