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change TLS_ADDR lowering to lower to a real mem operand, instead of matching as

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a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73834 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-06-20 20:38:48 +00:00
parent 6bfb669f82
commit 5c0b16d0c4
7 changed files with 44 additions and 11 deletions
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28
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -167,6 +167,8 @@ namespace {
SDValue &Segment);
bool SelectLEAAddr(SDValue Op, SDValue N, SDValue &Base,
SDValue &Scale, SDValue &Index, SDValue &Disp);
bool SelectTLSADDRAddr(SDValue Op, SDValue N, SDValue &Base,
SDValue &Scale, SDValue &Index, SDValue &Disp);
bool SelectScalarSSELoad(SDValue Op, SDValue Pred,
SDValue N, SDValue &Base, SDValue &Scale,
SDValue &Index, SDValue &Disp,
@ -1293,6 +1295,32 @@ bool X86DAGToDAGISel::SelectLEAAddr(SDValue Op, SDValue N,
return false;
}
/// SelectTLSADDRAddr - This is only run on TargetGlobalTLSAddress nodes.
bool X86DAGToDAGISel::SelectTLSADDRAddr(SDValue Op, SDValue N, SDValue &Base,
SDValue &Scale, SDValue &Index,
SDValue &Disp) {
assert(Op.getOpcode() == X86ISD::TLSADDR);
assert(N.getOpcode() == ISD::TargetGlobalTLSAddress);
const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
X86ISelAddressMode AM;
AM.GV = GA->getGlobal();
AM.Disp += GA->getOffset();
AM.Base.Reg = CurDAG->getRegister(0, N.getValueType());
if (N.getValueType() == MVT::i32) {
AM.Scale = 1;
AM.IndexReg = CurDAG->getRegister(X86::EBX, MVT::i32);
} else {
AM.IndexReg = CurDAG->getRegister(0, MVT::i64);
}
SDValue Segment;
getAddressOperands(AM, Base, Scale, Index, Disp, Segment);
return true;
}
bool X86DAGToDAGISel::TryFoldLoad(SDValue P, SDValue N,
SDValue &Base, SDValue &Scale,
SDValue &Index, SDValue &Disp,

9
lib/Target/X86/X86Instr64bit.td
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@ -48,6 +48,9 @@ def lea64addr : ComplexPattern<i64, 4, "SelectLEAAddr",
[add, mul, X86mul_imm, shl, or, frameindex, X86Wrapper],
[]>;
def tls64addr : ComplexPattern<i64, 4, "SelectTLSADDRAddr",
[tglobaltlsaddr], []>;
//===----------------------------------------------------------------------===//
// Pattern fragments.
//
@ -1330,13 +1333,13 @@ let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS],
Uses = [RSP] in
def TLS_addr64 : I<0, Pseudo, (outs), (ins i64imm:$sym),
def TLS_addr64 : I<0, Pseudo, (outs), (ins lea64mem:$sym),
".byte\t0x66; "
"leaq\t${sym:mem}(%rip), %rdi; "
"leaq\t$sym(%rip), %rdi; "
".word\t0x6666; "
"rex64; "
"call\t__tls_get_addr@PLT",
[(X86tlsaddr tglobaltlsaddr:$sym)]>,
[(X86tlsaddr tls64addr:$sym)]>,
Requires<[In64BitMode]>;
let AddedComplexity = 5 in

10
lib/Target/X86/X86InstrInfo.td
View File

@ -224,6 +224,8 @@ def brtarget : Operand<OtherVT> {
def addr : ComplexPattern<iPTR, 5, "SelectAddr", [], []>;
def lea32addr : ComplexPattern<i32, 4, "SelectLEAAddr",
[add, sub, mul, shl, or, frameindex], []>;
def tls32addr : ComplexPattern<i32, 4, "SelectTLSADDRAddr",
[tglobaltlsaddr], []>;
//===----------------------------------------------------------------------===//
// X86 Instruction Predicate Definitions.
@ -3112,11 +3114,11 @@ let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS],
Uses = [ESP, EBX] in
def TLS_addr32 : I<0, Pseudo, (outs), (ins i32imm:$sym),
"leal\t${sym:mem}(,%ebx,1), %eax; "
Uses = [ESP] in
def TLS_addr32 : I<0, Pseudo, (outs), (ins lea32mem:$sym),
"leal\t$sym, %eax; "
"call\t___tls_get_addr@PLT",
[(X86tlsaddr tglobaltlsaddr:$sym)]>,
[(X86tlsaddr tls32addr:$sym)]>,
Requires<[In32BitMode]>;
let AddedComplexity = 5 in

2
test/CodeGen/X86/tls1-pic.ll
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@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic > %t
; RUN: grep {leal i@TLSGD(,%ebx,1), %eax} %t
; RUN: grep {leal i@TLSGD(,%ebx), %eax} %t
; RUN: grep {call ___tls_get_addr@PLT} %t
; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic > %t2
; RUN: grep {leaq i@TLSGD(%rip), %rdi} %t2

2
test/CodeGen/X86/tls2-pic.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic > %t
; RUN: grep {leal i@TLSGD(,%ebx,1), %eax} %t
; RUN: grep {leal i@TLSGD(,%ebx), %eax} %t
; RUN: grep {call ___tls_get_addr@PLT} %t
; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic > %t2
; RUN: grep {leaq i@TLSGD(%rip), %rdi} %t2

2
test/CodeGen/X86/tls3-pic.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic > %t
; RUN: grep {leal i@TLSGD(,%ebx,1), %eax} %t
; RUN: grep {leal i@TLSGD(,%ebx), %eax} %t
; RUN: grep {call ___tls_get_addr@PLT} %t
; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic > %t2
; RUN: grep {leaq i@TLSGD(%rip), %rdi} %t2

2
test/CodeGen/X86/tls4-pic.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic > %t
; RUN: grep {leal i@TLSGD(,%ebx,1), %eax} %t
; RUN: grep {leal i@TLSGD(,%ebx), %eax} %t
; RUN: grep {call ___tls_get_addr@PLT} %t
; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic > %t2
; RUN: grep {leaq i@TLSGD(%rip), %rdi} %t2