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https://github.com/c64scene-ar/llvm-6502.git
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[x86] Remove some of the --show-mc-encoding flags from avx512 tests that
need to be updated for the new vector shuffle lowering. After talking to Adam Nemet, Tim Northover, etc., it seems that testing MC encodings in the same suite as the basic codegen isn't the right approach. Instead, we're going to want dedicated MC tests for the encodings. These encodings are starting to get in my way so I wanted to cut them out early. The total set of instructions that should have encoding tests added is: vpaddd vsqrtss vsqrtsd vmovlhps vmovhlps valignq vbroadcastss Not too many parts of these tests were even using this. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218932 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth
parent
59cacc9dec
commit
5c10a029ad
test/CodeGen/X86
@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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; CHECK-LABEL: addpd512
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; CHECK: vaddpd
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@ -223,7 +223,7 @@ define <16 x i32> @vpaddd_broadcast_test(<16 x i32> %i) nounwind {
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}
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; CHECK-LABEL: vpaddd_mask_test
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; CHECK: vpaddd {{%zmm[0-9]{1,2}, %zmm[0-9]{1,2}, %zmm[0-9]{1,2} {%k[1-7]} }}
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; CHECK: vpaddd {{%zmm[0-9], %zmm[0-9], %zmm[0-9] {%k[1-7]}}}
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; CHECK: ret
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define <16 x i32> @vpaddd_mask_test(<16 x i32> %i, <16 x i32> %j, <16 x i32> %mask1) nounwind readnone {
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%mask = icmp ne <16 x i32> %mask1, zeroinitializer
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@ -233,7 +233,7 @@ define <16 x i32> @vpaddd_mask_test(<16 x i32> %i, <16 x i32> %j, <16 x i32> %ma
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}
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; CHECK-LABEL: vpaddd_maskz_test
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; CHECK: vpaddd {{%zmm[0-9]{1,2}, %zmm[0-9]{1,2}, %zmm[0-9]{1,2} {%k[1-7]} {z} }}
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; CHECK: vpaddd {{%zmm[0-9], %zmm[0-9], %zmm[0-9] {%k[1-7]} {z}}}
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; CHECK: ret
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define <16 x i32> @vpaddd_maskz_test(<16 x i32> %i, <16 x i32> %j, <16 x i32> %mask1) nounwind readnone {
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%mask = icmp ne <16 x i32> %mask1, zeroinitializer
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@ -243,7 +243,7 @@ define <16 x i32> @vpaddd_maskz_test(<16 x i32> %i, <16 x i32> %j, <16 x i32> %m
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}
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; CHECK-LABEL: vpaddd_mask_fold_test
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; CHECK: vpaddd (%rdi), {{%zmm[0-9]{1,2}, %zmm[0-9]{1,2} {%k[1-7]} }}
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; CHECK: vpaddd (%rdi), {{%zmm[0-9], %zmm[0-9] {%k[1-7]}}}
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; CHECK: ret
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define <16 x i32> @vpaddd_mask_fold_test(<16 x i32> %i, <16 x i32>* %j.ptr, <16 x i32> %mask1) nounwind readnone {
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%mask = icmp ne <16 x i32> %mask1, zeroinitializer
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@ -254,7 +254,7 @@ define <16 x i32> @vpaddd_mask_fold_test(<16 x i32> %i, <16 x i32>* %j.ptr, <16
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}
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; CHECK-LABEL: vpaddd_mask_broadcast_test
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; CHECK: vpaddd LCP{{.*}}(%rip){1to16}, {{%zmm[0-9]{1,2}, %zmm[0-9]{1,2} {%k[1-7]} }}
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; CHECK: vpaddd LCP{{.*}}(%rip){1to16}, {{%zmm[0-9], %zmm[0-9] {%k[1-7]}}}
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; CHECK: ret
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define <16 x i32> @vpaddd_mask_broadcast_test(<16 x i32> %i, <16 x i32> %mask1) nounwind readnone {
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%mask = icmp ne <16 x i32> %mask1, zeroinitializer
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@ -264,7 +264,7 @@ define <16 x i32> @vpaddd_mask_broadcast_test(<16 x i32> %i, <16 x i32> %mask1)
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}
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; CHECK-LABEL: vpaddd_maskz_fold_test
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; CHECK: vpaddd (%rdi), {{%zmm[0-9]{1,2}, %zmm[0-9]{1,2} {%k[1-7]}}} {z}
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; CHECK: vpaddd (%rdi), {{%zmm[0-9], %zmm[0-9] {%k[1-7]}}} {z}
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; CHECK: ret
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define <16 x i32> @vpaddd_maskz_fold_test(<16 x i32> %i, <16 x i32>* %j.ptr, <16 x i32> %mask1) nounwind readnone {
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%mask = icmp ne <16 x i32> %mask1, zeroinitializer
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@ -275,7 +275,7 @@ define <16 x i32> @vpaddd_maskz_fold_test(<16 x i32> %i, <16 x i32>* %j.ptr, <16
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}
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; CHECK-LABEL: vpaddd_maskz_broadcast_test
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; CHECK: vpaddd LCP{{.*}}(%rip){1to16}, {{%zmm[0-9]{1,2}, %zmm[0-9]{1,2} {%k[1-7]}}} {z}
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; CHECK: vpaddd LCP{{.*}}(%rip){1to16}, {{%zmm[0-9], %zmm[0-9] {%k[1-7]}}} {z}
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; CHECK: ret
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define <16 x i32> @vpaddd_maskz_broadcast_test(<16 x i32> %i, <16 x i32> %mask1) nounwind readnone {
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%mask = icmp ne <16 x i32> %mask1, zeroinitializer
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@ -309,7 +309,7 @@ define <16 x i32> @vpmulld_test(<16 x i32> %i, <16 x i32> %j) {
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}
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; CHECK-LABEL: sqrtA
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; CHECK: vsqrtss {{.*}} encoding: [0x62
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; CHECK: vsqrtss {{.*}}
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; CHECK: ret
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declare float @sqrtf(float) readnone
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define float @sqrtA(float %a) nounwind uwtable readnone ssp {
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@ -319,7 +319,7 @@ entry:
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}
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; CHECK-LABEL: sqrtB
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; CHECK: vsqrtsd {{.*}}## encoding: [0x62
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; CHECK: vsqrtsd {{.*}}
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; CHECK: ret
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declare double @sqrt(double) readnone
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define double @sqrtB(double %a) nounwind uwtable readnone ssp {
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@ -329,7 +329,7 @@ entry:
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}
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; CHECK-LABEL: sqrtC
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; CHECK: vsqrtss {{.*}}## encoding: [0x62
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; CHECK: vsqrtss {{.*}}
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; CHECK: ret
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declare float @llvm.sqrt.f32(float)
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define float @sqrtC(float %a) nounwind {
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@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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; CHECK: LCP
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; CHECK: .long 2
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; CHECK: .long 5
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@ -169,7 +169,7 @@ define <16 x i32> @test11(<16 x i32> %a, <16 x i32>* %b) nounwind {
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}
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; CHECK-LABEL: test12
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; CHECK: vmovlhps {{.*}}## encoding: [0x62
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; CHECK: vmovlhps {{.*}}
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; CHECK: ret
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define <4 x i32> @test12(<4 x i32> %a, <4 x i32> %b) nounwind {
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%c = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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@ -226,7 +226,7 @@ define <8 x double> @test16(<8 x double> %a, <8 x double> %b) nounwind {
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}
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; CHECK-LABEL: test16k
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; CHECK: valignq $2, %zmm0, %zmm1, %zmm2 {%k1} #
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; CHECK: valignq $2, %zmm0, %zmm1, %zmm2 {%k1}
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define <8 x i64> @test16k(<8 x i64> %a, <8 x i64> %b, <8 x i64> %src, i8 %mask) nounwind {
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%c = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
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%m = bitcast i8 %mask to <8 x i1>
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@ -235,7 +235,7 @@ define <8 x i64> @test16k(<8 x i64> %a, <8 x i64> %b, <8 x i64> %src, i8 %mask)
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}
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; CHECK-LABEL: test16kz
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; CHECK: valignq $2, %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xf5,0xc9,0x03,0xc0,0x02]
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; CHECK: valignq $2, %zmm0, %zmm1, %zmm0 {%k1} {z}
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define <8 x i64> @test16kz(<8 x i64> %a, <8 x i64> %b, i8 %mask) nounwind {
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%c = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
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%m = bitcast i8 %mask to <8 x i1>
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@ -296,7 +296,7 @@ define <16 x float> @test21(<16 x float> %a, <16 x float> %c) {
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}
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; CHECK-LABEL: test22
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; CHECK: vmovhlps {{.*}}## encoding: [0x62
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; CHECK: vmovhlps {{.*}}
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; CHECK: ret
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define <4 x i32> @test22(<4 x i32> %a, <4 x i32> %b) nounwind {
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%c = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
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@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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;CHECK-LABEL: _inreg16xi32:
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;CHECK: vpbroadcastd {{.*}}, %zmm
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@ -45,7 +45,7 @@ define <16 x i32> @_xmm16xi32(<16 x i32> %a) {
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}
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;CHECK-LABEL: _xmm16xfloat
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;CHECK: vbroadcastss {{.*}}## encoding: [0x62
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;CHECK: vbroadcastss {{.*}}
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;CHECK: ret
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define <16 x float> @_xmm16xfloat(<16 x float> %a) {
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%b = shufflevector <16 x float> %a, <16 x float> undef, <16 x i32> zeroinitializer
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