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[mips] Use register number instead of name to print register $AT.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167315 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2012-11-02 21:26:03 +00:00
parent 265f191b57
commit 5c87b732f2
4 changed files with 15 additions and 15 deletions
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4
lib/Target/Mips/MipsRegisterInfo.td
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@ -73,7 +73,7 @@ class HWR<bits<5> num, string n> : MipsReg<n> {
let Namespace = "Mips" in { let Namespace = "Mips" in {
// General Purpose Registers // General Purpose Registers
def ZERO : MipsGPRReg< 0, "zero">, DwarfRegNum<[0]>; def ZERO : MipsGPRReg< 0, "zero">, DwarfRegNum<[0]>;
def AT : MipsGPRReg< 1, "at">, DwarfRegNum<[1]>; def AT : MipsGPRReg< 1, "1">, DwarfRegNum<[1]>;
def V0 : MipsGPRReg< 2, "2">, DwarfRegNum<[2]>; def V0 : MipsGPRReg< 2, "2">, DwarfRegNum<[2]>;
def V1 : MipsGPRReg< 3, "3">, DwarfRegNum<[3]>; def V1 : MipsGPRReg< 3, "3">, DwarfRegNum<[3]>;
def A0 : MipsGPRReg< 4, "4">, DwarfRegNum<[4]>; def A0 : MipsGPRReg< 4, "4">, DwarfRegNum<[4]>;
@ -107,7 +107,7 @@ let Namespace = "Mips" in {
// General Purpose 64-bit Registers // General Purpose 64-bit Registers
def ZERO_64 : Mips64GPRReg< 0, "zero", [ZERO]>, DwarfRegNum<[0]>; def ZERO_64 : Mips64GPRReg< 0, "zero", [ZERO]>, DwarfRegNum<[0]>;
def AT_64 : Mips64GPRReg< 1, "at", [AT]>, DwarfRegNum<[1]>; def AT_64 : Mips64GPRReg< 1, "1", [AT]>, DwarfRegNum<[1]>;
def V0_64 : Mips64GPRReg< 2, "2", [V0]>, DwarfRegNum<[2]>; def V0_64 : Mips64GPRReg< 2, "2", [V0]>, DwarfRegNum<[2]>;
def V1_64 : Mips64GPRReg< 3, "3", [V1]>, DwarfRegNum<[3]>; def V1_64 : Mips64GPRReg< 3, "3", [V1]>, DwarfRegNum<[3]>;
def A0_64 : Mips64GPRReg< 4, "4", [A0]>, DwarfRegNum<[4]>; def A0_64 : Mips64GPRReg< 4, "4", [A0]>, DwarfRegNum<[4]>;

4
test/CodeGen/Mips/largeimm1.ll
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@ -1,7 +1,7 @@
; RUN: llc -march=mipsel < %s | FileCheck %s ; RUN: llc -march=mipsel < %s | FileCheck %s
; CHECK: lui $at, 49152 ; CHECK: lui ${{[0-9]+}}, 49152
; CHECK: lui $at, 16384 ; CHECK: lui ${{[0-9]+}}, 16384
define void @f() nounwind { define void @f() nounwind {
entry: entry:
%a1 = alloca [1073741824 x i8], align 1 %a1 = alloca [1073741824 x i8], align 1

6
test/CodeGen/Mips/largeimmprinting.ll
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@ -6,9 +6,9 @@
define void @f() nounwind { define void @f() nounwind {
entry: entry:
; CHECK: lui $at, 65535 ; CHECK: lui $[[R0:[0-9]+]], 65535
; CHECK: addiu $at, $at, -16 ; CHECK: addiu $[[R0]], $[[R0]], -16
; CHECK: addu $sp, $sp, $at ; CHECK: addu $sp, $sp, $[[R0]]
%agg.tmp = alloca %struct.S1, align 1 %agg.tmp = alloca %struct.S1, align 1
%tmp = getelementptr inbounds %struct.S1* %agg.tmp, i32 0, i32 0, i32 0 %tmp = getelementptr inbounds %struct.S1* %agg.tmp, i32 0, i32 0, i32 0

16
test/CodeGen/Mips/longbranch.ll
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@ -6,15 +6,15 @@
define void @foo1(i32 %s) nounwind { define void @foo1(i32 %s) nounwind {
entry: entry:
; O32: bal ; O32: bal
; O32: lui $at, 0 ; O32: lui $1, 0
; O32: addiu $at, $at, {{[0-9]+}} ; O32: addiu $1, $1, {{[0-9]+}}
; N64: lui $at, 0 ; N64: lui $1, 0
; N64: daddiu $at, $at, 0 ; N64: daddiu $1, $1, 0
; N64: dsll $at, $at, 16 ; N64: dsll $1, $1, 16
; N64: daddiu $at, $at, 0 ; N64: daddiu $1, $1, 0
; N64: bal ; N64: bal
; N64: dsll $at, $at, 16 ; N64: dsll $1, $1, 16
; N64: daddiu $at, $at, {{[0-9]+}} ; N64: daddiu $1, $1, {{[0-9]+}}
%tobool = icmp eq i32 %s, 0 %tobool = icmp eq i32 %s, 0
br i1 %tobool, label %if.end, label %if.then br i1 %tobool, label %if.end, label %if.then