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https://github.com/c64scene-ar/llvm-6502.git
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add some code to support cross-register class copying from
RST -> RFP{32/64/80}. We only handle ST(0) for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48104 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1400,10 +1400,10 @@ X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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}
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void X86InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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const TargetRegisterClass *SrcRC) const {
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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const TargetRegisterClass *SrcRC) const {
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if (DestRC == SrcRC) {
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unsigned Opc;
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if (DestRC == &X86::GR64RegClass) {
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@ -1464,6 +1464,24 @@ void X86InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
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return;
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}
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}
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// Moving ST(0) to/from a register turns into FpGET_ST0_32 etc.
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if (SrcRC == &X86::RSTRegClass) {
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// Copying from ST(0). FIXME: handle ST(1) also
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assert(SrcReg == X86::ST0 && "Can only copy from TOS right now");
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unsigned Opc;
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if (DestRC == &X86::RFP32RegClass)
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Opc = X86::FpGET_ST0_32;
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else if (DestRC == &X86::RFP64RegClass)
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Opc = X86::FpGET_ST0_64;
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else {
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assert(DestRC == &X86::RFP80RegClass);
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Opc = X86::FpGET_ST0_80;
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}
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BuildMI(MBB, MI, get(Opc), DestReg);
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return;
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}
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cerr << "Not yet supported!";
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abort();
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}
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