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Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding is
the same as ARM except that the condition code field is always set to ARMCC::AL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107107 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1600,7 +1600,7 @@ void ARMCodeEmitter::emitNEONGetLaneInstruction(const MachineInstr &MI) {
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unsigned Binary = getBinaryCodeForInstr(MI);
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// Set the conditional execution predicate
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Binary |= II->getPredicate(&MI) << ARMII::CondShift;
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Binary |= (IsThumb ? ARMCC::AL : II->getPredicate(&MI)) << ARMII::CondShift;
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unsigned RegT = MI.getOperand(0).getReg();
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RegT = ARMRegisterInfo::getRegisterNumbering(RegT);
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