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Modify operand order for Create{Sign,Zero}ExtensionInstructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3960 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -497,10 +497,10 @@ UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
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{ // sign- or zero-extend respectively
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storeVal = new TmpInstruction(storeType, val);
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if (val->getType()->isSigned())
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CreateSignExtensionInstructions(target, F, val, 8*srcSize, storeVal,
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CreateSignExtensionInstructions(target, F, val, storeVal, 8*srcSize,
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mvec, mcfi);
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else
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CreateZeroExtensionInstructions(target, F, val, 8*srcSize, storeVal,
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CreateZeroExtensionInstructions(target, F, val, storeVal, 8*srcSize,
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mvec, mcfi);
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}
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MachineInstr* store=new MachineInstr(ChooseStoreInstruction(storeType));
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@ -640,27 +640,27 @@ CreateBitExtensionInstructions(bool signExtend,
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const TargetMachine& target,
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Function* F,
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Value* srcVal,
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unsigned int srcSizeInBits,
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Value* dest,
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Value* destVal,
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unsigned int numLowBits,
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vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi)
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{
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MachineInstr* M;
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assert(srcSizeInBits <= 32 &&
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"Hmmm... 32 < srcSizeInBits < 64 unexpected but could be handled.");
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if (srcSizeInBits < 32)
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assert(numLowBits <= 32 && "Otherwise, nothing should be done here!");
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if (numLowBits < 32)
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{ // SLL is needed since operand size is < 32 bits.
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TmpInstruction *tmpI = new TmpInstruction(dest->getType(),
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srcVal, dest,"make32");
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TmpInstruction *tmpI = new TmpInstruction(destVal->getType(),
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srcVal, destVal, "make32");
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mcfi.addTemp(tmpI);
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M = Create3OperandInstr_UImmed(SLLX, srcVal, 32-srcSizeInBits, tmpI);
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M = Create3OperandInstr_UImmed(SLLX, srcVal, 32-numLowBits, tmpI);
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mvec.push_back(M);
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srcVal = tmpI;
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}
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M = Create3OperandInstr_UImmed(signExtend? SRA : SRL,
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srcVal, 32-srcSizeInBits, dest);
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srcVal, 32-numLowBits, destVal);
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mvec.push_back(M);
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}
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@ -676,13 +676,13 @@ UltraSparcInstrInfo::CreateSignExtensionInstructions(
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const TargetMachine& target,
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Function* F,
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Value* srcVal,
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unsigned int srcSizeInBits,
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Value* dest,
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Value* destVal,
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unsigned int numLowBits,
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vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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{
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CreateBitExtensionInstructions(/*signExtend*/ true, target, F, srcVal,
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srcSizeInBits, dest, mvec, mcfi);
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destVal, numLowBits, mvec, mcfi);
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}
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@ -698,11 +698,11 @@ UltraSparcInstrInfo::CreateZeroExtensionInstructions(
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const TargetMachine& target,
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Function* F,
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Value* srcVal,
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unsigned int srcSizeInBits,
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Value* dest,
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Value* destVal,
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unsigned int numLowBits,
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vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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{
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CreateBitExtensionInstructions(/*signExtend*/ false, target, F, srcVal,
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srcSizeInBits, dest, mvec, mcfi);
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destVal, numLowBits, mvec, mcfi);
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}
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@ -194,8 +194,8 @@ struct UltraSparcInstrInfo : public MachineInstrInfo {
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virtual void CreateSignExtensionInstructions(const TargetMachine& target,
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Function* F,
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Value* srcVal,
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unsigned int srcSizeInBits,
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Value* dest,
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Value* destVal,
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unsigned int numLowBits,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const;
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@ -208,8 +208,8 @@ struct UltraSparcInstrInfo : public MachineInstrInfo {
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virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
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Function* F,
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Value* srcVal,
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unsigned int srcSizeInBits,
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Value* dest,
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Value* destVal,
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unsigned int numLowBits,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const;
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};
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