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Backing out previous check-in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28219 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -406,15 +406,6 @@ static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
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}
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}
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static bool isZeroLengthInterval(LiveInterval *li) {
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for (LiveInterval::Ranges::const_iterator
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i = li->ranges.begin(), e = li->ranges.end(); i != e; ++i)
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if (i->end - i->start > LiveIntervals::InstrSlots::NUM)
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return false;
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return true;
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}
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/// assignRegOrStackSlotAtInterval - assign a register if one is available, or
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/// spill.
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void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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@ -565,16 +556,10 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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DEBUG(std::cerr << "\t\tregister with min weight: "
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<< mri_->getName(minReg) << " (" << minWeight << ")\n");
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// If the live interval legnth is essentially zero, i.e. in every live range
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// the use follows def immediately, it doesn't make sense to spill it and
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// hope it will be easier to allocate for this li.
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if (isZeroLengthInterval(cur))
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DEBUG(std::cerr << "\t\tavoid spilling zero length live interval: "
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<< *cur << '\n';);
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// if the current has the minimum weight, we need to spill it and
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// add any added intervals back to unhandled, and restart
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// linearscan.
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else if (cur->weight <= minWeight) {
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if (cur->weight <= minWeight) {
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DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n';);
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int slot = vrm_->assignVirt2StackSlot(cur->reg);
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std::vector<LiveInterval*> added =
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