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Implement the 'store FPIMM, Ptr' -> 'store INTIMM, Ptr' optimization for
all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19366 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -424,6 +424,31 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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Tmp2 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer.
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// Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
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if (ConstantFPSDNode *CFP =
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dyn_cast<ConstantFPSDNode>(Node->getOperand(1))) {
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if (CFP->getValueType(0) == MVT::f32) {
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union {
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unsigned I;
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float F;
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} V;
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V.F = CFP->getValue();
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Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1,
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DAG.getConstant(V.I, MVT::i32), Tmp2);
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} else {
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assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!");
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union {
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uint64_t I;
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double F;
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} V;
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V.F = CFP->getValue();
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Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1,
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DAG.getConstant(V.I, MVT::i64), Tmp2);
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}
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Op = Result;
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Node = Op.Val;
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}
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switch (getTypeAction(Node->getOperand(1).getValueType())) {
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case Legal: {
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SDOperand Val = LegalizeOp(Node->getOperand(1));
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