From 5d382c45da834a3296f851ad2609ee1c52c958e9 Mon Sep 17 00:00:00 2001 From: JF Bastien Date: Tue, 14 Jul 2015 23:06:07 +0000 Subject: [PATCH] WebAssembly: fix build breakage. Summary: processFunctionBeforeCalleeSavedScan was renamed to determineCalleeSaves and now takes a BitVector parameter as of rL242165, reviewed in http://reviews.llvm.org/D10909 WebAssembly is still marked as experimental and therefore doesn't build by default. It does, however, grep by default! I notice that processFunctionBeforeCalleeSavedScan is still mentioned in a few comments and error messages, which I also fixed. Reviewers: qcolombet, sunfish Subscribers: jfb, dsanders, hfinkel, MatzeB, llvm-commits Differential Revision: http://reviews.llvm.org/D11199 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242242 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetRegisterInfo.h | 2 +- lib/Target/AArch64/AArch64FrameLowering.cpp | 2 +- lib/Target/AArch64/AArch64MachineFunctionInfo.h | 2 +- lib/Target/ARM/ARMMachineFunctionInfo.h | 2 +- lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp | 7 ++++--- lib/Target/WebAssembly/WebAssemblyFrameLowering.h | 4 ++-- test/CodeGen/AArch64/arm64-spill-lr.ll | 6 +++--- 7 files changed, 13 insertions(+), 12 deletions(-) diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 0ee936a7621..6f13f52c423 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -769,7 +769,7 @@ public: /// x86, if the frame register is required, the first fixed stack object is /// reserved as its spill slot. This tells PEI not to create a new stack frame /// object for the given register. It should be called only after - /// processFunctionBeforeCalleeSavedScan(). + /// determineCalleeSaves(). virtual bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg, int &FrameIdx) const { return false; diff --git a/lib/Target/AArch64/AArch64FrameLowering.cpp b/lib/Target/AArch64/AArch64FrameLowering.cpp index a7817f4f67d..98d9e6d39ed 100644 --- a/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -910,7 +910,7 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF, unsigned NumFPRSpilled = 0; bool ExtraCSSpill = false; bool CanEliminateFrame = true; - DEBUG(dbgs() << "*** processFunctionBeforeCalleeSavedScan\nUsed CSRs:"); + DEBUG(dbgs() << "*** determineCalleeSaves\nUsed CSRs:"); const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); // Check pairs of consecutive callee-saved registers. diff --git a/lib/Target/AArch64/AArch64MachineFunctionInfo.h b/lib/Target/AArch64/AArch64MachineFunctionInfo.h index 536a8d0f97a..b9e1ace6f0c 100644 --- a/lib/Target/AArch64/AArch64MachineFunctionInfo.h +++ b/lib/Target/AArch64/AArch64MachineFunctionInfo.h @@ -42,7 +42,7 @@ class AArch64FunctionInfo : public MachineFunctionInfo { unsigned ArgumentStackToRestore; /// HasStackFrame - True if this function has a stack frame. Set by - /// processFunctionBeforeCalleeSavedScan(). + /// determineCalleeSaves(). bool HasStackFrame; /// \brief Amount of stack frame size, not including callee-saved registers. diff --git a/lib/Target/ARM/ARMMachineFunctionInfo.h b/lib/Target/ARM/ARMMachineFunctionInfo.h index 14dd9ef333a..2c70f473c81 100644 --- a/lib/Target/ARM/ARMMachineFunctionInfo.h +++ b/lib/Target/ARM/ARMMachineFunctionInfo.h @@ -52,7 +52,7 @@ class ARMFunctionInfo : public MachineFunctionInfo { unsigned ReturnRegsCount; /// HasStackFrame - True if this function has a stack frame. Set by - /// processFunctionBeforeCalleeSavedScan(). + /// determineCalleeSaves(). bool HasStackFrame; /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by diff --git a/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp b/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp index e4ca82e963c..3d9050ae216 100644 --- a/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp +++ b/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp @@ -68,7 +68,8 @@ void WebAssemblyFrameLowering::emitEpilogue(MachineFunction &MF, llvm_unreachable("TODO: implement emitEpilogue"); } -void WebAssemblyFrameLowering::processFunctionBeforeCalleeSavedScan( - MachineFunction &MF, RegScavenger *RS) const { - llvm_unreachable("TODO: implement processFunctionBeforeCalleeSavedScan"); +void WebAssemblyFrameLowering::determineCalleeSaves(MachineFunction &MF, + BitVector &SavedRegs, + RegScavenger *RS) const { + llvm_unreachable("TODO: implement determineCalleeSaves"); } diff --git a/lib/Target/WebAssembly/WebAssemblyFrameLowering.h b/lib/Target/WebAssembly/WebAssemblyFrameLowering.h index 0b112d02c0b..704f892bbaa 100644 --- a/lib/Target/WebAssembly/WebAssemblyFrameLowering.h +++ b/lib/Target/WebAssembly/WebAssemblyFrameLowering.h @@ -39,8 +39,8 @@ public: bool hasFP(const MachineFunction &MF) const override; bool hasReservedCallFrame(const MachineFunction &MF) const override; - void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS) const override; + void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, + RegScavenger *RS = nullptr) const override; }; } // end namespace llvm diff --git a/test/CodeGen/AArch64/arm64-spill-lr.ll b/test/CodeGen/AArch64/arm64-spill-lr.ll index 88109088a2f..2ea5d7810a1 100644 --- a/test/CodeGen/AArch64/arm64-spill-lr.ll +++ b/test/CodeGen/AArch64/arm64-spill-lr.ll @@ -1,9 +1,9 @@ ; RUN: llc -mtriple=arm64-apple-ios < %s @bar = common global i32 0, align 4 -; Leaf function which uses all callee-saved registers and allocates >= 256 bytes on the stack -; this will cause processFunctionBeforeCalleeSavedScan() to spill LR as an additional scratch -; register. +; Leaf function which uses all callee-saved registers and allocates >= 256 bytes +; on the stack this will cause determineCalleeSaves() to spill LR as an +; additional scratch register. ; ; This is a crash-only regression test for rdar://15124582. define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) nounwind {