6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-28 09:31:03 +00:00
Code Issues Projects Releases Wiki Activity

Revert r54876 r54877 r54906 and r54907. Evan found that these caused a 20%

Browse Source 
slowdown in bzip2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55113 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nick Lewycky 2008-08-21 05:56:10 +00:00
parent 1f0f37a742
commit 5d52c4501a
2 changed files with 24 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

68
lib/Transforms/Scalar/InstructionCombining.cpp
View File

@ -5492,62 +5492,37 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
// See if it's the same type of instruction on the left and right. // See if it's the same type of instruction on the left and right.
if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) { if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) {
if (BinaryOperator *Op1I = dyn_cast<BinaryOperator>(Op1)) { if (BinaryOperator *Op1I = dyn_cast<BinaryOperator>(Op1)) {
if (Op0I->getOpcode() == Op1I->getOpcode() && if (Op0I->getOpcode() == Op1I->getOpcode() && Op0I->hasOneUse() &&
Op0I->getOperand(1) == Op1I->getOperand(1)) { Op1I->hasOneUse() && Op0I->getOperand(1) == Op1I->getOperand(1) &&
I.isEquality()) {
switch (Op0I->getOpcode()) { switch (Op0I->getOpcode()) {
default: break; default: break;
case Instruction::Add: case Instruction::Add:
case Instruction::Sub: case Instruction::Sub:
case Instruction::Xor: case Instruction::Xor:
if (I.isEquality()) { // a+x icmp eq/ne b+x --> a icmp b
// icmp eq/ne a+x, b+x --> icmp eq/ne a, b
return new ICmpInst(I.getPredicate(), Op0I->getOperand(0), return new ICmpInst(I.getPredicate(), Op0I->getOperand(0),
Op1I->getOperand(0)); Op1I->getOperand(0));
} else {
if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
// icmp u/s (a ^ signbit), (b ^ signbit) --> icmp s/u a, b
if (CI->getValue().isSignBit()) {
ICmpInst::Predicate Pred = I.isSignedPredicate()
? I.getUnsignedPredicate()
: I.getSignedPredicate();
return new ICmpInst(Pred, Op0I->getOperand(0),
Op1I->getOperand(0));
}
// icmp u/s (a ^ ~signbit), (b ^ ~signbit) --> icmp s/u b, a
if ((~CI->getValue()).isSignBit()) {
ICmpInst::Predicate Pred = I.isSignedPredicate()
? I.getUnsignedPredicate()
: I.getSignedPredicate();
Pred = I.getSwappedPredicate(Pred);
return new ICmpInst(Pred, Op0I->getOperand(0),
Op1I->getOperand(0));
}
}
}
break; break;
case Instruction::Mul: case Instruction::Mul:
if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
// a * Cst icmp eq/ne b * Cst --> a & Mask icmp b & Mask // a * Cst icmp eq/ne b * Cst --> a & Mask icmp b & Mask
// Mask = -1 >> count-trailing-zeros(Cst). // Mask = -1 >> count-trailing-zeros(Cst).
if (Op0I->hasOneUse() && Op1I->hasOneUse() && I.isEquality()) {
if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
if (!CI->isZero() && !CI->isOne()) { if (!CI->isZero() && !CI->isOne()) {
const APInt &AP = CI->getValue(); const APInt &AP = CI->getValue();
ConstantInt *Mask = ConstantInt *Mask = ConstantInt::get(
ConstantInt::get(APInt::getLowBitsSet(AP.getBitWidth(), APInt::getLowBitsSet(AP.getBitWidth(),
AP.getBitWidth() - AP.getBitWidth() -
AP.countTrailingZeros())); AP.countTrailingZeros()));
Instruction *And1 = Instruction *And1 = BinaryOperator::CreateAnd(Op0I->getOperand(0),
BinaryOperator::CreateAnd(Op0I->getOperand(0), Mask); Mask);
Instruction *And2 = Instruction *And2 = BinaryOperator::CreateAnd(Op1I->getOperand(0),
BinaryOperator::CreateAnd(Op1I->getOperand(0), Mask); Mask);
InsertNewInstBefore(And1, I); InsertNewInstBefore(And1, I);
InsertNewInstBefore(And2, I); InsertNewInstBefore(And2, I);
return new ICmpInst(I.getPredicate(), And1, And2); return new ICmpInst(I.getPredicate(), And1, And2);
} }
} }
}
break; break;
} }
} }
@ -5820,27 +5795,6 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
else else
return new ICmpInst(ICmpInst::ICMP_SLT, CompareVal, AddOne(RHS)); return new ICmpInst(ICmpInst::ICMP_SLT, CompareVal, AddOne(RHS));
} }
// (icmp u/s (xor A SignBit), C) -> (icmp s/u A, (xor C SignBit))
if (!ICI.isEquality() && XorCST->getValue().isSignBit()) {
const APInt &SignBit = XorCST->getValue();
ICmpInst::Predicate Pred = ICI.isSignedPredicate()
? ICI.getUnsignedPredicate()
: ICI.getSignedPredicate();
return new ICmpInst(Pred, LHSI->getOperand(0),
ConstantInt::get(RHSV ^ SignBit));
}
// (icmp u/s (xor A ~SignBit), C) -> (icmp s/u (xor C ~SignBit), A)
if (!ICI.isEquality() && (~XorCST->getValue()).isSignBit()) {
const APInt &NotSignBit = XorCST->getValue();
ICmpInst::Predicate Pred = ICI.isSignedPredicate()
? ICI.getUnsignedPredicate()
: ICI.getSignedPredicate();
Pred = ICI.getSwappedPredicate(Pred);
return new ICmpInst(Pred, LHSI->getOperand(0),
ConstantInt::get(RHSV ^ NotSignBit));
}
} }
break; break;
case Instruction::And: // (icmp pred (and X, AndCST), RHS) case Instruction::And: // (icmp pred (and X, AndCST), RHS)

3
test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep -v xor ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep xor
; XFAIL: *
define i1 @test1(i8 %x, i8 %y) { define i1 @test1(i8 %x, i8 %y) {
%X = xor i8 %x, 128 %X = xor i8 %x, 128