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Basic non-power-of-2 vector support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44181 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -338,7 +338,7 @@
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#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
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#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
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typedef union YYSTYPE
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typedef union YYSTYPE
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#line 968 "/home/asl/proj/llvm/src/lib/AsmParser/llvmAsmParser.y"
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#line 968 "/llvm/lib/AsmParser/llvmAsmParser.y"
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{
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{
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llvm::Module *ModuleVal;
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llvm::Module *ModuleVal;
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llvm::Function *FunctionVal;
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llvm::Function *FunctionVal;
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@ -385,7 +385,7 @@ typedef union YYSTYPE
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llvm::ICmpInst::Predicate IPredicate;
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llvm::ICmpInst::Predicate IPredicate;
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llvm::FCmpInst::Predicate FPredicate;
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llvm::FCmpInst::Predicate FPredicate;
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}
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}
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/* Line 1489 of yacc.c. */
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/* Line 1529 of yacc.c. */
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#line 390 "llvmAsmParser.tab.h"
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#line 390 "llvmAsmParser.tab.h"
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YYSTYPE;
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YYSTYPE;
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# define yystype YYSTYPE /* obsolescent; will be withdrawn */
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# define yystype YYSTYPE /* obsolescent; will be withdrawn */
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@ -1422,8 +1422,6 @@ Types
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GEN_ERROR("Unsigned result not equal to signed result");
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GEN_ERROR("Unsigned result not equal to signed result");
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if (!ElemTy->isFloatingPoint() && !ElemTy->isInteger())
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if (!ElemTy->isFloatingPoint() && !ElemTy->isInteger())
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GEN_ERROR("Element type of a VectorType must be primitive");
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GEN_ERROR("Element type of a VectorType must be primitive");
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if (!isPowerOf2_32($2))
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GEN_ERROR("Vector length should be a power of 2");
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$$ = new PATypeHolder(HandleUpRefs(VectorType::get(*$4, (unsigned)$2)));
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$$ = new PATypeHolder(HandleUpRefs(VectorType::get(*$4, (unsigned)$2)));
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delete $4;
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delete $4;
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CHECK_FOR_ERROR
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CHECK_FOR_ERROR
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@ -1422,8 +1422,6 @@ Types
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GEN_ERROR("Unsigned result not equal to signed result");
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GEN_ERROR("Unsigned result not equal to signed result");
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if (!ElemTy->isFloatingPoint() && !ElemTy->isInteger())
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if (!ElemTy->isFloatingPoint() && !ElemTy->isInteger())
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GEN_ERROR("Element type of a VectorType must be primitive");
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GEN_ERROR("Element type of a VectorType must be primitive");
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if (!isPowerOf2_32($2))
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GEN_ERROR("Vector length should be a power of 2");
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$$ = new PATypeHolder(HandleUpRefs(VectorType::get(*$4, (unsigned)$2)));
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$$ = new PATypeHolder(HandleUpRefs(VectorType::get(*$4, (unsigned)$2)));
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delete $4;
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delete $4;
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CHECK_FOR_ERROR
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CHECK_FOR_ERROR
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@ -2158,7 +2158,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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break;
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break;
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} else {
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} else {
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SplitVectorOp(Node->getOperand(1), Lo, Hi);
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SplitVectorOp(Node->getOperand(1), Lo, Hi);
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IncrementSize = NumElems/2 * MVT::getSizeInBits(EVT)/8;
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IncrementSize = MVT::getVectorNumElements(Lo.Val->getValueType(0)) *
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MVT::getSizeInBits(EVT)/8;
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}
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}
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} else {
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} else {
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ExpandOp(Node->getOperand(1), Lo, Hi);
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ExpandOp(Node->getOperand(1), Lo, Hi);
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@ -6226,9 +6227,14 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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SDNode *Node = Op.Val;
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SDNode *Node = Op.Val;
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unsigned NumElements = MVT::getVectorNumElements(Op.getValueType());
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unsigned NumElements = MVT::getVectorNumElements(Op.getValueType());
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assert(NumElements > 1 && "Cannot split a single element vector!");
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assert(NumElements > 1 && "Cannot split a single element vector!");
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unsigned NewNumElts = NumElements/2;
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MVT::ValueType NewEltVT = MVT::getVectorElementType(Op.getValueType());
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MVT::ValueType NewEltVT = MVT::getVectorElementType(Op.getValueType());
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MVT::ValueType NewVT = MVT::getVectorType(NewEltVT, NewNumElts);
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unsigned NewNumElts_Lo = 1 << Log2_32(NumElements-1);
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unsigned NewNumElts_Hi = NumElements - NewNumElts_Lo;
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MVT::ValueType NewVT_Lo = MVT::getVectorType(NewEltVT, NewNumElts_Lo);
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MVT::ValueType NewVT_Hi = MVT::getVectorType(NewEltVT, NewNumElts_Hi);
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// See if we already split it.
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// See if we already split it.
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std::map<SDOperand, std::pair<SDOperand, SDOperand> >::iterator I
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std::map<SDOperand, std::pair<SDOperand, SDOperand> >::iterator I
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@ -6253,25 +6259,27 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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SplitVectorOp(Node->getOperand(0), Lo, Hi);
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SplitVectorOp(Node->getOperand(0), Lo, Hi);
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unsigned Index = cast<ConstantSDNode>(Node->getOperand(2))->getValue();
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unsigned Index = cast<ConstantSDNode>(Node->getOperand(2))->getValue();
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SDOperand ScalarOp = Node->getOperand(1);
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SDOperand ScalarOp = Node->getOperand(1);
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if (Index < NewNumElts)
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if (Index < NewNumElts_Lo)
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Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVT, Lo, ScalarOp,
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Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVT_Lo, Lo, ScalarOp,
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DAG.getConstant(Index, TLI.getPointerTy()));
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DAG.getConstant(Index, TLI.getPointerTy()));
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else
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else
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Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVT, Hi, ScalarOp,
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Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVT_Hi, Hi, ScalarOp,
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DAG.getConstant(Index - NewNumElts, TLI.getPointerTy()));
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DAG.getConstant(Index - NewNumElts_Lo,
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TLI.getPointerTy()));
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break;
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break;
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}
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}
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case ISD::BUILD_VECTOR: {
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case ISD::BUILD_VECTOR: {
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SmallVector<SDOperand, 8> LoOps(Node->op_begin(),
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SmallVector<SDOperand, 8> LoOps(Node->op_begin(),
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Node->op_begin()+NewNumElts);
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Node->op_begin()+NewNumElts_Lo);
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Lo = DAG.getNode(ISD::BUILD_VECTOR, NewVT, &LoOps[0], LoOps.size());
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Lo = DAG.getNode(ISD::BUILD_VECTOR, NewVT_Lo, &LoOps[0], LoOps.size());
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SmallVector<SDOperand, 8> HiOps(Node->op_begin()+NewNumElts,
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SmallVector<SDOperand, 8> HiOps(Node->op_begin()+NewNumElts_Lo,
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Node->op_end());
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Node->op_end());
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Hi = DAG.getNode(ISD::BUILD_VECTOR, NewVT, &HiOps[0], HiOps.size());
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Hi = DAG.getNode(ISD::BUILD_VECTOR, NewVT_Hi, &HiOps[0], HiOps.size());
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break;
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break;
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}
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}
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case ISD::CONCAT_VECTORS: {
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case ISD::CONCAT_VECTORS: {
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// FIXME: Handle non-power-of-two vectors?
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unsigned NewNumSubvectors = Node->getNumOperands() / 2;
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unsigned NewNumSubvectors = Node->getNumOperands() / 2;
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if (NewNumSubvectors == 1) {
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if (NewNumSubvectors == 1) {
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Lo = Node->getOperand(0);
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Lo = Node->getOperand(0);
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@ -6279,11 +6287,11 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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} else {
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} else {
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SmallVector<SDOperand, 8> LoOps(Node->op_begin(),
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SmallVector<SDOperand, 8> LoOps(Node->op_begin(),
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Node->op_begin()+NewNumSubvectors);
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Node->op_begin()+NewNumSubvectors);
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Lo = DAG.getNode(ISD::CONCAT_VECTORS, NewVT, &LoOps[0], LoOps.size());
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Lo = DAG.getNode(ISD::CONCAT_VECTORS, NewVT_Lo, &LoOps[0], LoOps.size());
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SmallVector<SDOperand, 8> HiOps(Node->op_begin()+NewNumSubvectors,
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SmallVector<SDOperand, 8> HiOps(Node->op_begin()+NewNumSubvectors,
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Node->op_end());
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Node->op_end());
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Hi = DAG.getNode(ISD::CONCAT_VECTORS, NewVT, &HiOps[0], HiOps.size());
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Hi = DAG.getNode(ISD::CONCAT_VECTORS, NewVT_Hi, &HiOps[0], HiOps.size());
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}
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}
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break;
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break;
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}
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}
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@ -6298,12 +6306,12 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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// Handle a vector merge.
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// Handle a vector merge.
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SDOperand CL, CH;
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SDOperand CL, CH;
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SplitVectorOp(Cond, CL, CH);
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SplitVectorOp(Cond, CL, CH);
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Lo = DAG.getNode(Node->getOpcode(), NewVT, CL, LL, RL);
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Lo = DAG.getNode(Node->getOpcode(), NewVT_Lo, CL, LL, RL);
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Hi = DAG.getNode(Node->getOpcode(), NewVT, CH, LH, RH);
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Hi = DAG.getNode(Node->getOpcode(), NewVT_Hi, CH, LH, RH);
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} else {
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} else {
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// Handle a simple select with vector operands.
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// Handle a simple select with vector operands.
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Lo = DAG.getNode(Node->getOpcode(), NewVT, Cond, LL, RL);
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Lo = DAG.getNode(Node->getOpcode(), NewVT_Lo, Cond, LL, RL);
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Hi = DAG.getNode(Node->getOpcode(), NewVT, Cond, LH, RH);
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Hi = DAG.getNode(Node->getOpcode(), NewVT_Hi, Cond, LH, RH);
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}
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}
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break;
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break;
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}
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}
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@ -6324,16 +6332,16 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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SplitVectorOp(Node->getOperand(0), LL, LH);
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SplitVectorOp(Node->getOperand(0), LL, LH);
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SplitVectorOp(Node->getOperand(1), RL, RH);
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SplitVectorOp(Node->getOperand(1), RL, RH);
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Lo = DAG.getNode(Node->getOpcode(), NewVT, LL, RL);
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Lo = DAG.getNode(Node->getOpcode(), NewVT_Lo, LL, RL);
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Hi = DAG.getNode(Node->getOpcode(), NewVT, LH, RH);
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Hi = DAG.getNode(Node->getOpcode(), NewVT_Hi, LH, RH);
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break;
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break;
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}
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}
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case ISD::FPOWI: {
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case ISD::FPOWI: {
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SDOperand L, H;
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SDOperand L, H;
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SplitVectorOp(Node->getOperand(0), L, H);
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SplitVectorOp(Node->getOperand(0), L, H);
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Lo = DAG.getNode(Node->getOpcode(), NewVT, L, Node->getOperand(1));
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Lo = DAG.getNode(Node->getOpcode(), NewVT_Lo, L, Node->getOperand(1));
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Hi = DAG.getNode(Node->getOpcode(), NewVT, H, Node->getOperand(1));
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Hi = DAG.getNode(Node->getOpcode(), NewVT_Hi, H, Node->getOperand(1));
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break;
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break;
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}
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}
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case ISD::CTTZ:
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case ISD::CTTZ:
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@ -6347,8 +6355,8 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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SDOperand L, H;
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SDOperand L, H;
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SplitVectorOp(Node->getOperand(0), L, H);
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SplitVectorOp(Node->getOperand(0), L, H);
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Lo = DAG.getNode(Node->getOpcode(), NewVT, L);
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Lo = DAG.getNode(Node->getOpcode(), NewVT_Lo, L);
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Hi = DAG.getNode(Node->getOpcode(), NewVT, H);
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Hi = DAG.getNode(Node->getOpcode(), NewVT_Hi, H);
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break;
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break;
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}
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}
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case ISD::LOAD: {
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case ISD::LOAD: {
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@ -6360,13 +6368,13 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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unsigned Alignment = LD->getAlignment();
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unsigned Alignment = LD->getAlignment();
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bool isVolatile = LD->isVolatile();
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bool isVolatile = LD->isVolatile();
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Lo = DAG.getLoad(NewVT, Ch, Ptr, SV, SVOffset, isVolatile, Alignment);
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Lo = DAG.getLoad(NewVT_Lo, Ch, Ptr, SV, SVOffset, isVolatile, Alignment);
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unsigned IncrementSize = NewNumElts * MVT::getSizeInBits(NewEltVT)/8;
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unsigned IncrementSize = NewNumElts_Lo * MVT::getSizeInBits(NewEltVT)/8;
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Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
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Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
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getIntPtrConstant(IncrementSize));
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getIntPtrConstant(IncrementSize));
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SVOffset += IncrementSize;
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SVOffset += IncrementSize;
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Alignment = MinAlign(Alignment, IncrementSize);
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Alignment = MinAlign(Alignment, IncrementSize);
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Hi = DAG.getLoad(NewVT, Ch, Ptr, SV, SVOffset, isVolatile, Alignment);
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Hi = DAG.getLoad(NewVT_Hi, Ch, Ptr, SV, SVOffset, isVolatile, Alignment);
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// Build a factor node to remember that this load is independent of the
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// Build a factor node to remember that this load is independent of the
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// other one.
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// other one.
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@ -6394,8 +6402,8 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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}
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}
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// Split the vector and convert each of the pieces now.
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// Split the vector and convert each of the pieces now.
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SplitVectorOp(InOp, Lo, Hi);
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SplitVectorOp(InOp, Lo, Hi);
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Lo = DAG.getNode(ISD::BIT_CONVERT, NewVT, Lo);
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Lo = DAG.getNode(ISD::BIT_CONVERT, NewVT_Lo, Lo);
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Hi = DAG.getNode(ISD::BIT_CONVERT, NewVT, Hi);
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Hi = DAG.getNode(ISD::BIT_CONVERT, NewVT_Hi, Hi);
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break;
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break;
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}
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}
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}
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}
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@ -1209,7 +1209,6 @@ static ManagedStatic<TypeMap<VectorValType, VectorType> > VectorTypes;
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VectorType *VectorType::get(const Type *ElementType, unsigned NumElements) {
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VectorType *VectorType::get(const Type *ElementType, unsigned NumElements) {
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assert(ElementType && "Can't get vector of null types!");
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assert(ElementType && "Can't get vector of null types!");
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assert(isPowerOf2_32(NumElements) && "Vector length should be a power of 2!");
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VectorValType PVT(ElementType, NumElements);
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VectorValType PVT(ElementType, NumElements);
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VectorType *PT = VectorTypes->get(PVT);
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VectorType *PT = VectorTypes->get(PVT);
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