6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-15 07:34:33 +00:00
Code Issues Projects Releases Wiki Activity

Implement support for vector operands to inline asm, implementing

Browse Source 
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35332 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-03-25 05:00:54 +00:00
parent 6dc44b02ee
commit 5df99b376f
1 changed files with 16 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -2387,14 +2387,23 @@ SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
if (RegVT == ValueVT)
return Val;
if (MVT::isVector(RegVT)) {
assert(ValueVT == MVT::Vector && "Unknown vector conversion!");
return DAG.getNode(ISD::VBIT_CONVERT, MVT::Vector, Val,
DAG.getConstant(MVT::getVectorNumElements(RegVT),
MVT::i32),
DAG.getValueType(MVT::getVectorBaseType(RegVT)));
}
if (MVT::isInteger(RegVT)) {
if (ValueVT < RegVT)
return DAG.getNode(ISD::TRUNCATE, ValueVT, Val);
else
return DAG.getNode(ISD::ANY_EXTEND, ValueVT, Val);
} else {
return DAG.getNode(ISD::FP_ROUND, ValueVT, Val);
}
assert(MVT::isFloatingPoint(RegVT) && MVT::isFloatingPoint(ValueVT));
return DAG.getNode(ISD::FP_ROUND, ValueVT, Val);
}
/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
@ -2407,7 +2416,10 @@ void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
// If there is a single register and the types differ, this must be
// a promotion.
if (RegVT != ValueVT) {
if (MVT::isInteger(RegVT)) {
if (MVT::isVector(RegVT)) {
assert(Val.getValueType() == MVT::Vector &&"Not a vector-vector cast?");
Val = DAG.getNode(ISD::VBIT_CONVERT, RegVT, Val);
} else if (MVT::isInteger(RegVT)) {
if (RegVT < ValueVT)
Val = DAG.getNode(ISD::TRUNCATE, RegVT, Val);
else
@ -3424,7 +3436,7 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
// If this value was promoted, truncate it down.
if (ResVal.getValueType() != VT) {
if (VT == MVT::Vector) {
// Insert a VBITCONVERT to convert from the packed result type to the
// Insert a VBIT_CONVERT to convert from the packed result type to the
// MVT::Vector type.
unsigned NumElems = cast<VectorType>(RetTy)->getNumElements();
const Type *EltTy = cast<VectorType>(RetTy)->getElementType();