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https://github.com/c64scene-ar/llvm-6502.git
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Use two pinsrw to insert an element into v4i32 / v4f32 vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27779 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -309,6 +309,9 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Custom);
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setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Custom);
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setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);
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setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);
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// Implement v4f32 insert_vector_elt in terms of SSE2 v8i16 ones.
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setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);
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// Custom lower build_vector, vector_shuffle, and extract_vector_elt.
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for (unsigned VT = (unsigned)MVT::v16i8; VT != (unsigned)MVT::v2i64; VT++) {
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@ -3002,14 +3005,38 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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// as its second argument.
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MVT::ValueType VT = Op.getValueType();
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MVT::ValueType BaseVT = MVT::getVectorBaseType(VT);
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SDOperand N0 = Op.getOperand(0);
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SDOperand N1 = Op.getOperand(1);
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SDOperand N2 = Op.getOperand(2);
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if (MVT::getSizeInBits(BaseVT) == 16) {
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SDOperand N1 = Op.getOperand(1);
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SDOperand N2 = Op.getOperand(2);
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if (N1.getValueType() != MVT::i32)
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N1 = DAG.getNode(ISD::ANY_EXTEND, MVT::i32, N1);
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if (N2.getValueType() != MVT::i32)
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N2 = DAG.getConstant(cast<ConstantSDNode>(N2)->getValue(), MVT::i32);
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return DAG.getNode(X86ISD::PINSRW, VT, Op.getOperand(0), N1, N2);
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return DAG.getNode(X86ISD::PINSRW, VT, N0, N1, N2);
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} else if (MVT::getSizeInBits(BaseVT) == 32) {
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// Use two pinsrw instructions to insert a 32 bit value.
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unsigned Idx = cast<ConstantSDNode>(N2)->getValue();
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Idx <<= 1;
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if (MVT::isFloatingPoint(N1.getValueType())) {
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if (N1.getOpcode() == ISD::LOAD) {
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// Just load directly from f32mem to R32.
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N1 = DAG.getLoad(MVT::i32, N1.getOperand(0), N1.getOperand(1),
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N1.getOperand(2));
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} else {
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N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, N1);
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N1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, N1);
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N1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i32, N1,
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DAG.getConstant(0, MVT::i32));
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}
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}
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N0 = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, N0);
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N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1,
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DAG.getConstant(Idx, MVT::i32));
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N1 = DAG.getNode(ISD::SRL, MVT::i32, N1, DAG.getConstant(16, MVT::i8));
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N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1,
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DAG.getConstant(Idx+1, MVT::i32));
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return DAG.getNode(ISD::BIT_CONVERT, VT, N0);
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}
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return SDOperand();
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