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Just like we use the RHS of an AND to simplify the LHS, use the LHS to

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simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-02-27 00:22:28 +00:00
parent cfdbb7caa8
commit 5f0c658aa4
1 changed files with 17 additions and 0 deletions
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17
lib/CodeGen/SelectionDAG/TargetLowering.cpp
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@ -223,6 +223,23 @@ bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask,
// If the RHS is a constant, see if we can simplify it.
if (TLO.ShrinkDemandedConstant(Op, DemandedMask & ~KnownZero2))
return true;
// If the RHS is a constant, check to see if the LHS would be zero without
// using the bits from the RHS. Above, we used knowledge about the RHS to
// simplify the LHS, here we're using information from the LHS to simplify
// the RHS.
if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
uint64_t LHSZero, LHSOne;
ComputeMaskedBits(Op.getOperand(0), DemandedMask,
LHSZero, LHSOne, Depth+1);
// If the LHS already has zeros where RHSC does, this and is dead.
if ((LHSZero & DemandedMask) == (~RHSC->getValue() & DemandedMask))
return TLO.CombineTo(Op, Op.getOperand(0));
// If any of the set bits in the RHS are known zero on the LHS, shrink
// the constant.
if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & DemandedMask))
return true;
}
// Output known-1 bits are only known if set in both the LHS & RHS.
KnownOne &= KnownOne2;