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Splats for v8i32/v8f32 can be handled by VPERMILPSY. This was causing
infinite recursive calls in legalize. Fix PR10562 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137296 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4066,11 +4066,11 @@ static SDValue getUnpackh(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1,
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return DAG.getVectorShuffle(VT, dl, V1, V2, &Mask[0]);
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}
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// PromoteSplatv8v16 - All i16 and i8 vector types can't be used directly by
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// PromoteSplati8i16 - All i16 and i8 vector types can't be used directly by
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// a generic shuffle instruction because the target has no such instructions.
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// Generate shuffles which repeat i16 and i8 several times until they can be
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// represented by v4f32 and then be manipulated by target suported shuffles.
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static SDValue PromoteSplatv8v16(SDValue V, SelectionDAG &DAG, int &EltNo) {
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static SDValue PromoteSplati8i16(SDValue V, SelectionDAG &DAG, int &EltNo) {
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EVT VT = V.getValueType();
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int NumElems = VT.getVectorNumElements();
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DebugLoc dl = V.getDebugLoc();
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@ -4162,8 +4162,9 @@ static SDValue PromoteSplat(ShuffleVectorSDNode *SV, SelectionDAG &DAG) {
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}
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// Make this 128-bit vector duplicate i8 and i16 elements
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if (NumElems > 4)
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V1 = PromoteSplatv8v16(V1, DAG, EltNo);
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EVT EltVT = SrcVT.getVectorElementType();
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if (NumElems > 4 && (EltVT == MVT::i8 || EltVT == MVT::i16))
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V1 = PromoteSplati8i16(V1, DAG, EltNo);
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// Recreate the 256-bit vector and place the same 128-bit vector
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// into the low and high part. This is necessary because we want
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@ -6027,8 +6028,7 @@ SDValue NormalizeVectorShuffle(SDValue Op, SelectionDAG &DAG,
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return PromoteVectorToScalarSplat(SVOp, DAG);
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// Handle splats by matching through known shuffle masks
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if ((VT.is128BitVector() && NumElem <= 4) ||
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(VT.is256BitVector() && NumElem <= 8))
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if (VT.is128BitVector() && NumElem <= 4)
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return SDValue();
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// All i16 and i8 vector types can't be used directly by a generic shuffle
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@ -51,8 +51,9 @@ entry:
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; To:
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; shuffle (vload ptr)), undef, <1, 1, 1, 1>
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; CHECK: vmovaps
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; CHECK-NEXT: vpextrd
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define void @funcE() nounwind {
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; CHECK-NEXT: vinsertf128 $1
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; CHECK-NEXT: vpermilps $-1
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define <8 x float> @funcE() nounwind {
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allocas:
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%udx495 = alloca [18 x [18 x float]], align 32
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br label %for_test505.preheader
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@ -74,7 +75,7 @@ load.i1247: ; preds = %for_exit499
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__load_and_broadcast_32.exit1249: ; preds = %load.i1247, %for_exit499
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%load_broadcast12281250 = phi <8 x float> [ %phitmp, %load.i1247 ], [ undef, %for_exit499 ]
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ret void
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ret <8 x float> %load_broadcast12281250
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}
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; CHECK: vpshufd $0
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@ -87,3 +88,20 @@ define <8 x float> @funcF(i32* %ptr) nounwind {
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ret <8 x float> %tmp
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}
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; CHECK: vinsertf128 $1
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; CHECK-NEXT: vpermilps $0
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define <8 x float> @funcG(<8 x float> %a) nounwind uwtable readnone ssp {
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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ret <8 x float> %shuffle
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}
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; CHECK: vextractf128 $1
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; CHECK-NEXT: vinsertf128 $1
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; CHECK-NEXT: vpermilps $85
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define <8 x float> @funcH(<8 x float> %a) nounwind uwtable readnone ssp {
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
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ret <8 x float> %shuffle
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}
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