mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-24 13:18:17 +00:00
(1) Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.
(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -94,7 +94,7 @@ MachineInstr::SetMachineOperandVal(unsigned i,
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if (isDefAndUse)
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operands[i].flags = MachineOperand::DEFUSEFLAG;
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else if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
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operands[i].flags = MachineOperand::DEFFLAG;
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operands[i].flags = MachineOperand::DEFONLYFLAG;
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else
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operands[i].flags = 0;
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}
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@@ -126,7 +126,7 @@ MachineInstr::SetMachineOperandReg(unsigned i,
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operands[i].regNum = regNum;
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if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
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operands[i].flags = MachineOperand::DEFFLAG;
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operands[i].flags = MachineOperand::DEFONLYFLAG;
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else
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operands[i].flags = 0;
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@@ -152,7 +152,7 @@ MachineInstr::substituteValue(const Value* oldVal, Value* newVal, bool defsOnly)
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// Subsitute operands
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for (MachineInstr::val_op_iterator O = begin(), E = end(); O != E; ++O)
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if (*O == oldVal)
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if (!defsOnly || O.isDef())
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if (!defsOnly || !O.isUseOnly())
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{
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O.getMachineOperand().value = newVal;
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++numSubst;
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@@ -161,7 +161,7 @@ MachineInstr::substituteValue(const Value* oldVal, Value* newVal, bool defsOnly)
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// Subsitute implicit refs
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for (unsigned i=0, N=getNumImplicitRefs(); i < N; ++i)
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if (getImplicitRef(i) == oldVal)
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if (!defsOnly || implicitRefIsDefined(i))
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if (!defsOnly || !getImplicitOp(i).opIsUse())
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{
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getImplicitOp(i).value = newVal;
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++numSubst;
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@@ -281,7 +281,8 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) const {
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unsigned StartOp = 0;
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// Specialize printing if op#0 is definition
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if (getNumOperands() && operandIsDefined(0)) {
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if (getNumOperands() &&
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(getOperand(0).opIsDefOnly() || getOperand(0).opIsDefAndUse())) {
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::print(getOperand(0), OS, TM);
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OS << " = ";
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++StartOp; // Don't print this operand again!
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@@ -289,14 +290,15 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) const {
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OS << TM.getInstrInfo().getName(getOpcode());
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for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
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const MachineOperand& mop = getOperand(i);
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if (i != StartOp)
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OS << ",";
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OS << " ";
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::print(getOperand(i), OS, TM);
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::print(mop, OS, TM);
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if (operandIsDefinedAndUsed(i))
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if (mop.opIsDefAndUse())
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OS << "<def&use>";
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else if (operandIsDefined(i))
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else if (mop.opIsDefOnly())
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OS << "<def>";
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}
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@@ -305,10 +307,10 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) const {
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OS << "\tImplicitRefs: ";
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for(unsigned i = 0, e = getNumImplicitRefs(); i != e; ++i) {
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OS << "\t";
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OutputValue(OS, getImplicitRef(i));
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if (implicitRefIsDefinedAndUsed(i))
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OutputValue(OS, getImplicitRef(i));
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if (getImplicitOp(i).opIsDefAndUse())
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OS << "<def&use>";
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else if (implicitRefIsDefined(i))
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else if (getImplicitOp(i).opIsDefOnly())
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OS << "<def>";
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}
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}
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@@ -323,9 +325,9 @@ std::ostream &operator<<(std::ostream& os, const MachineInstr& MI)
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for (unsigned i=0, N=MI.getNumOperands(); i < N; i++) {
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os << "\t" << MI.getOperand(i);
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if (MI.operandIsDefined(i))
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if (MI.getOperand(i).opIsDefOnly())
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os << "<d>";
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if (MI.operandIsDefinedAndUsed(i))
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if (MI.getOperand(i).opIsDefAndUse())
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os << "<d&u>";
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}
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@@ -335,8 +337,8 @@ std::ostream &operator<<(std::ostream& os, const MachineInstr& MI)
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os << "\tImplicit: ";
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for (unsigned z=0; z < NumOfImpRefs; z++) {
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OutputValue(os, MI.getImplicitRef(z));
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if (MI.implicitRefIsDefined(z)) os << "<d>";
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if (MI.implicitRefIsDefinedAndUsed(z)) os << "<d&u>";
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if (MI.getImplicitOp(z).opIsDefOnly()) os << "<d>";
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if (MI.getImplicitOp(z).opIsDefAndUse()) os << "<d&u>";
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os << "\t";
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}
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}
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