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Split Register specific stuff out from TargetMachine.h to RegInfo.h
Get rid of unneccesary #includes from TargetMachine.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@568 91177308-0d34-0410-b5e6-96231b3b80d8
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include/llvm/Target
@ -8,10 +8,13 @@
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#define LLVM_TARGET_INSTINFO_H
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#include "llvm/Target/Machine.h"
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#include "llvm/Support/DataTypes.h"
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class MachineInstrDescriptor;
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typedef int InstrSchedClass;
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// Global variable holding an array of descriptors for machine instructions.
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// The actual object needs to be created separately for each target machine.
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// This variable is initialized and reset by class MachineInstrInfo.
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@ -9,14 +9,8 @@
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#include "llvm/Target/Data.h"
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#include "llvm/Support/NonCopyable.h"
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#include "llvm/Support/DataTypes.h"
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#include <string>
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#include <hash_map>
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#include <hash_set>
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#include <algorithm>
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class StructType;
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struct MachineInstrDescriptor;
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class TargetMachine;
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class MachineInstrInfo;
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@ -27,107 +21,6 @@ class MachineInstrInfo;
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typedef int MachineOpCode;
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typedef int OpCodeMask;
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static const unsigned MAX_OPCODE_SIZE = 16;
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//-----------------------------------------------------------------------------
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// class MachineRegClassInfo
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//
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// Purpose:
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// Interface to description of machine register class (e.g., int reg class
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// float reg class etc)
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//
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//--------------------------------------------------------------------------
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class IGNode;
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class MachineRegClassInfo {
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protected:
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const unsigned RegClassID; // integer ID of a reg class
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const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
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const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
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public:
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inline unsigned getRegClassID() const { return RegClassID; }
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inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
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inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
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// This method should find a color which is not used by neighbors
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// (i.e., a false position in IsColorUsedArr) and
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virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0;
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MachineRegClassInfo(const unsigned ID, const unsigned NVR,
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const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR),
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NumOfAllRegs(NAR)
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{ } // empty constructor
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};
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//---------------------------------------------------------------------------
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// class MachineRegInfo
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//
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// Purpose:
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// Interface to register info of target machine
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//
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//--------------------------------------------------------------------------
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class LiveRangeInfo;
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class Method;
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class Instruction;
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class LiveRange;
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class AddedInstrns;
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class MachineInstr;
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typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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// A vector of all machine register classes
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typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
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class MachineRegInfo : public NonCopyableV {
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protected:
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MachineRegClassArrayType MachineRegClassArr;
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public:
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inline unsigned int getNumOfRegClasses() const {
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return MachineRegClassArr.size();
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}
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const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
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return MachineRegClassArr[i];
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}
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virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
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virtual void colorArgs(const Method *const Meth,
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LiveRangeInfo & LRI) const = 0;
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virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
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LiveRangeInfo& LRI,
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AddedInstrMapType& AddedInstrMap ) const = 0;
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virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
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virtual const string getUnifiedRegName(int reg) const = 0;
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//virtual void printReg(const LiveRange *const LR) const =0;
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MachineRegInfo() { }
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};
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//---------------------------------------------------------------------------
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99
include/llvm/Target/RegInfo.h
Normal file
99
include/llvm/Target/RegInfo.h
Normal file
@ -0,0 +1,99 @@
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//===-- llvm/Target/RegInfo.h - Target Register Information ------*- C++ -*-==//
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//
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// This file is used to describe the register system of a target to the register
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// allocator.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_REGINFO_H
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#define LLVM_TARGET_REGINFO_H
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class LiveRangeInfo;
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class Method;
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class Instruction;
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class LiveRange;
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class AddedInstrns;
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class MachineInstr;
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//-----------------------------------------------------------------------------
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// class MachineRegClassInfo
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//
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// Purpose:
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// Interface to description of machine register class (e.g., int reg class
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// float reg class etc)
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//
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//--------------------------------------------------------------------------
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class IGNode;
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class MachineRegClassInfo {
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protected:
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const unsigned RegClassID; // integer ID of a reg class
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const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
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const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
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public:
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inline unsigned getRegClassID() const { return RegClassID; }
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inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
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inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
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// This method should find a color which is not used by neighbors
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// (i.e., a false position in IsColorUsedArr) and
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virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0;
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MachineRegClassInfo(const unsigned ID, const unsigned NVR,
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const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR),
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NumOfAllRegs(NAR) { }
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};
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//---------------------------------------------------------------------------
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// class MachineRegInfo
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//
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// Purpose:
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// Interface to register info of target machine
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//
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//--------------------------------------------------------------------------
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typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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// A vector of all machine register classes
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typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
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class MachineRegInfo : public NonCopyableV {
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protected:
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MachineRegClassArrayType MachineRegClassArr;
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public:
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inline unsigned int getNumOfRegClasses() const {
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return MachineRegClassArr.size();
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}
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const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
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return MachineRegClassArr[i];
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}
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virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
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virtual void colorArgs(const Method *const Meth,
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LiveRangeInfo & LRI) const = 0;
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virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
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LiveRangeInfo& LRI,
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AddedInstrMapType& AddedInstrMap ) const = 0;
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virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
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virtual const string getUnifiedRegName(int reg) const = 0;
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//virtual void printReg(const LiveRange *const LR) const =0;
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MachineRegInfo() { }
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};
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#endif
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#define LLVM_TARGET_SCHEDINFO_H
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#include "llvm/Target/InstInfo.h"
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#include <hash_map>
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typedef long long cycles_t;
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const cycles_t HUGE_LATENCY = ~((unsigned long long) 1 << sizeof(cycles_t)-1);
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const cycles_t INVALID_LATENCY = -HUGE_LATENCY;
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static const unsigned MAX_OPCODE_SIZE = 16;
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class OpCodePair {
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public:
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