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Revert "Fix IfConverter to handle regmask machine operands."

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This reverts commit b27413cbfd78d959c18e713bfa271fb69e6b3303 (ie r236515).

This is to get the bots green while i investigate the failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236517 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Pete Cooper
2015-05-05 18:49:05 +00:00
parent 92a55e80b8
commit 5ffc7bfc9a
2 changed files with 0 additions and 59 deletions
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14
lib/CodeGen/IfConversion.cpp
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@@ -985,20 +985,6 @@ static void UpdatePredRedefs(MachineInstr *MI, LivePhysRegs &Redefs) {
// take a mutable instruction instead of const.
MachineInstr *OpMI = const_cast<MachineInstr*>(Op.getParent());
MachineInstrBuilder MIB(*OpMI->getParent()->getParent(), OpMI);
if (Op.isRegMask()) {
// First handle regmasks. They clobber any entries in the mask which
// means that we need a def for those registers.
MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
// We also need to add an implicit def of this register for the later
// use to read from.
// For the register allocator to have allocated a register clobbered
// by the call which is used later, it must be the case that
// the call doesn't return.
MIB.addReg(Reg.first, RegState::Implicit | RegState::Define);
continue;
}
assert(Op.isReg() && "Register operand required");
MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
}