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[FastISel] Rename public visible FastISel functions. NFC.
This commit renames the following public FastISel functions: LowerArguments -> lowerArguments SelectInstruction -> selectInstruction TargetSelectInstruction -> fastSelectInstruction FastLowerArguments -> fastLowerArguments FastLowerCall -> fastLowerCall FastLowerIntrinsicCall -> fastLowerIntrinsicCall FastEmitZExtFromI1 -> fastEmitZExtFromI1 FastEmitBranch -> fastEmitBranch UpdateValueMap -> updateValueMap TargetMaterializeConstant -> fastMaterializeConstant TargetMaterializeAlloca -> fastMaterializeAlloca TargetMaterializeFloatZero -> fastMaterializeFloatZero LowerCallTo -> lowerCallTo Reviewed by Eric git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217074 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -214,12 +214,12 @@ public:
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/// \brief Do "fast" instruction selection for function arguments and append
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/// the machine instructions to the current block. Returns true when
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/// successful.
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bool LowerArguments();
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bool lowerArguments();
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/// \brief Do "fast" instruction selection for the given LLVM IR instruction
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/// and append the generated machine instructions to the current block.
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/// Returns true if selection was successful.
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bool SelectInstruction(const Instruction *I);
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bool selectInstruction(const Instruction *I);
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/// \brief Do "fast" instruction selection for the given LLVM IR operator
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/// (Instruction or ConstantExpr), and append generated machine instructions
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@@ -295,19 +295,19 @@ protected:
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/// FastISel process fails to select an instruction. This gives targets a
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/// chance to emit code for anything that doesn't fit into FastISel's
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/// framework. It returns true if it was successful.
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virtual bool TargetSelectInstruction(const Instruction *I) = 0;
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virtual bool fastSelectInstruction(const Instruction *I) = 0;
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/// \brief This method is called by target-independent code to do target-
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/// specific argument lowering. It returns true if it was successful.
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virtual bool FastLowerArguments();
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virtual bool fastLowerArguments();
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/// \brief This method is called by target-independent code to do target-
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/// specific call lowering. It returns true if it was successful.
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virtual bool FastLowerCall(CallLoweringInfo &CLI);
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virtual bool fastLowerCall(CallLoweringInfo &CLI);
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/// \brief This method is called by target-independent code to do target-
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/// specific intrinsic lowering. It returns true if it was successful.
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virtual bool FastLowerIntrinsicCall(const IntrinsicInst *II);
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virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
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/// \brief This method is called by target-independent code to request that an
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/// instruction with the given type and opcode be emitted.
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@@ -433,11 +433,11 @@ protected:
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/// \brief Emit MachineInstrs to compute the value of Op with all but the
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/// least significant bit set to zero.
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unsigned FastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill);
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unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill);
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/// \brief Emit an unconditional branch to the given block, unless it is the
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/// immediate (fall-through) successor, and update the CFG.
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void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
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void fastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
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/// \brief Update the value map to include the new mapping for this
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/// instruction, or insert an extra copy to get the result in a previous
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@@ -446,7 +446,7 @@ protected:
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/// NOTE: This is only necessary because we might select a block that uses a
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/// value before we select the block that defines the value. It might be
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/// possible to fix this by selecting blocks in reverse postorder.
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void UpdateValueMap(const Value *I, unsigned Reg, unsigned NumRegs = 1);
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void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs = 1);
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unsigned createResultReg(const TargetRegisterClass *RC);
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@@ -458,14 +458,14 @@ protected:
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/// \brief Emit a constant in a register using target-specific logic, such as
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/// constant pool loads.
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virtual unsigned TargetMaterializeConstant(const Constant *C) { return 0; }
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virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
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/// \brief Emit an alloca address in a register using target-specific logic.
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virtual unsigned TargetMaterializeAlloca(const AllocaInst *C) { return 0; }
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virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
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/// \brief Emit the floating-point constant +0.0 in a register using target-
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/// specific logic.
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virtual unsigned TargetMaterializeFloatZero(const ConstantFP *CF) {
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virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
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return 0;
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}
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@@ -484,7 +484,7 @@ protected:
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/// \brief Create a machine mem operand from the given instruction.
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MachineMemOperand *createMachineMemOperandFor(const Instruction *I) const;
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bool LowerCallTo(const CallInst *CI, const char *SymName, unsigned NumArgs);
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bool lowerCallTo(const CallInst *CI, const char *SymName, unsigned NumArgs);
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bool lowerCallTo(CallLoweringInfo &CLI);
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bool isCommutativeIntrinsic(IntrinsicInst const *II) {
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@@ -499,6 +499,8 @@ protected:
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}
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}
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bool lowerCall(const CallInst *I);
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/// \brief Select and emit code for a binary operator instruction, which has
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/// an opcode which directly corresponds to the given ISD opcode.
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bool selectBinaryOp(const User *I, unsigned ISDOpcode);
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@@ -506,7 +508,6 @@ protected:
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bool selectGetElementPtr(const User *I);
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bool selectStackmap(const CallInst *I);
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bool selectPatchpoint(const CallInst *I);
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bool lowerCall(const CallInst *I);
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bool selectCall(const User *Call);
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bool selectIntrinsicCall(const IntrinsicInst *II);
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bool selectBitCast(const User *I);
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