From 60616b61dc96e538ca0e1e1c391751ce9edff386 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 11 Mar 2014 00:01:27 +0000 Subject: [PATCH] Fix indentation git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203515 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPUInstrInfo.cpp | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/lib/Target/R600/AMDGPUInstrInfo.cpp b/lib/Target/R600/AMDGPUInstrInfo.cpp index 4bc90c0404e..e32dd9fc651 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.cpp +++ b/lib/Target/R600/AMDGPUInstrInfo.cpp @@ -124,17 +124,16 @@ AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, bool AMDGPUInstrInfo::expandPostRAPseudo (MachineBasicBlock::iterator MI) const { MachineBasicBlock *MBB = MI->getParent(); - int OffsetOpIdx = - AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::addr); + int OffsetOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), + AMDGPU::OpName::addr); // addr is a custom operand with multiple MI operands, and only the // first MI operand is given a name. int RegOpIdx = OffsetOpIdx + 1; - int ChanOpIdx = - AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::chan); - + int ChanOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), + AMDGPU::OpName::chan); if (isRegisterLoad(*MI)) { - int DstOpIdx = - AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); + int DstOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), + AMDGPU::OpName::dst); unsigned RegIndex = MI->getOperand(RegOpIdx).getImm(); unsigned Channel = MI->getOperand(ChanOpIdx).getImm(); unsigned Address = calculateIndirectAddress(RegIndex, Channel); @@ -147,8 +146,8 @@ bool AMDGPUInstrInfo::expandPostRAPseudo (MachineBasicBlock::iterator MI) const Address, OffsetReg); } } else if (isRegisterStore(*MI)) { - int ValOpIdx = - AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::val); + int ValOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), + AMDGPU::OpName::val); AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); unsigned RegIndex = MI->getOperand(RegOpIdx).getImm(); unsigned Channel = MI->getOperand(ChanOpIdx).getImm();