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Update due to mainline API change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70769 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -15,15 +15,19 @@
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#ifndef LLVM_TARGET_MSP430_H
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#define LLVM_TARGET_MSP430_H
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class MSP430TargetMachine;
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class FunctionPass;
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class raw_ostream;
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FunctionPass *createMSP430ISelDag(MSP430TargetMachine &TM);
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FunctionPass *createMSP430CodePrinterPass(raw_ostream &OS,
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MSP430TargetMachine &TM,
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bool Fast, bool Verbose);
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FunctionPass *createMSP430ISelDag(MSP430TargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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FunctionPass *createMSP430CodePrinterPass(raw_ostream &o,
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MSP430TargetMachine &tm,
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CodeGenOpt::Level OptLevel,
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bool verbose);
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} // end namespace llvm;
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// Defines symbolic names for MSP430 registers.
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@ -40,8 +40,9 @@ namespace {
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class VISIBILITY_HIDDEN MSP430AsmPrinter : public AsmPrinter {
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public:
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MSP430AsmPrinter(raw_ostream &O, MSP430TargetMachine &TM,
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const TargetAsmInfo *TAI, bool Fast, bool Verbose)
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: AsmPrinter(O, TM, TAI, Fast, Verbose) {}
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const TargetAsmInfo *TAI,
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CodeGenOpt::Level OL, bool V)
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: AsmPrinter(O, TM, TAI, OL, V) {}
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virtual const char *getPassName() const {
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return "MSP430 Assembly Printer";
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@ -76,8 +77,9 @@ namespace {
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///
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FunctionPass *llvm::createMSP430CodePrinterPass(raw_ostream &o,
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MSP430TargetMachine &tm,
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bool fast, bool verbose) {
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return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
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CodeGenOpt::Level OptLevel,
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bool verbose) {
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return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
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}
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bool MSP430AsmPrinter::doInitialization(Module &M) {
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@ -41,8 +41,8 @@ namespace {
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const MSP430Subtarget &Subtarget;
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public:
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MSP430DAGToDAGISel(MSP430TargetMachine &TM)
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: SelectionDAGISel(TM),
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MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel)
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: SelectionDAGISel(TM, OptLevel),
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Lowering(*TM.getTargetLowering()),
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Subtarget(*TM.getSubtargetImpl()) { }
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@ -68,8 +68,9 @@ namespace {
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/// createMSP430ISelDag - This pass converts a legalized DAG into a
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/// MSP430-specific DAG, ready for instruction scheduling.
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///
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FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM) {
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return new MSP430DAGToDAGISel(TM);
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FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM,
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CodeGenOpt::Level OptLevel) {
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return new MSP430DAGToDAGISel(TM, OptLevel);
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}
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// FIXME: This is pretty dummy routine and needs to be rewritten in the future.
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@ -47,17 +47,19 @@ const TargetAsmInfo *MSP430TargetMachine::createTargetAsmInfo() const {
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return new MSP430TargetAsmInfo(*this);
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}
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bool MSP430TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
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bool MSP430TargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// Install an instruction selector.
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PM.add(createMSP430ISelDag(*this));
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PM.add(createMSP430ISelDag(*this, OptLevel));
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return false;
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}
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bool MSP430TargetMachine::addAssemblyEmitter(PassManagerBase &PM,
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bool Fast, bool Verbose,
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CodeGenOpt::Level OptLevel,
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bool Verbose,
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raw_ostream &Out) {
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// Output assembly language.
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PM.add(createMSP430CodePrinterPass(Out, *this, Fast, Verbose));
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PM.add(createMSP430CodePrinterPass(Out, *this, OptLevel, Verbose));
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return false;
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}
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@ -56,9 +56,10 @@ public:
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return const_cast<MSP430TargetLowering*>(&TLInfo);
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}
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virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
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virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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bool Verbose, raw_ostream &Out);
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virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
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virtual bool addAssemblyEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel, bool Verbose,
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raw_ostream &Out);
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static unsigned getModuleMatchQuality(const Module &M);
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}; // MSP430TargetMachine.
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