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Clean up the add/sub w/ SP source reg instructions in Thumb2 a bit. Add a FIXME
for more thorough cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121315 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1154,27 +1154,30 @@ def t2LEApcrelJT : T2PCOneRegImm<(outs rGPR:$Rd),
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let Inst{15} = 0;
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}
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// FIXME: None of these add/sub SP special instructions should be necessary
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// at all for thumb2 since they use the same encodings as the generic
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// add/sub instructions. In thumb1 we need them since they have dedicated
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// encodings. At the least, they should be pseudo instructions.
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// ADD r, sp, {so_imm|i12}
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def t2ADDrSPi : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, t2_so_imm:$imm),
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IIC_iALUi, "add", ".w\t$Rd, $sp, $imm", []> {
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def t2ADDrSPi : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$Rn, t2_so_imm:$imm),
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IIC_iALUi, "add", ".w\t$Rd, $Rn, $imm", []> {
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let Inst{31-27} = 0b11110;
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let Inst{25} = 0;
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let Inst{24-21} = 0b1000;
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let Inst{19-16} = 0b1101; // Rn = sp
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let Inst{15} = 0;
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}
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def t2ADDrSPi12 : T2TwoRegImm<(outs GPR:$Rd), (ins GPR:$Rn, imm0_4095:$imm),
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IIC_iALUi, "addw", "\t$Rd, $Rn, $imm", []> {
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let Inst{31-27} = 0b11110;
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let Inst{25-20} = 0b100000;
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let Inst{19-16} = 0b1101; // Rn = sp
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let Inst{15} = 0;
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}
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// ADD r, sp, so_reg
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def t2ADDrSPs : T2sTwoRegShiftedReg<
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(outs GPR:$Rd), (ins GPR:$sp, t2_so_reg:$ShiftedRm),
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IIC_iALUsi, "add", ".w\t$Rd, $sp, $ShiftedRm", []> {
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(outs GPR:$Rd), (ins GPR:$Rn, t2_so_reg:$ShiftedRm),
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IIC_iALUsi, "add", ".w\t$Rd, $Rn, $ShiftedRm", []> {
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let Inst{31-27} = 0b11101;
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let Inst{26-25} = 0b01;
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let Inst{24-21} = 0b1000;
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@ -1182,12 +1185,11 @@ def t2ADDrSPs : T2sTwoRegShiftedReg<
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}
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// SUB r, sp, {so_imm|i12}
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def t2SUBrSPi : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, t2_so_imm:$imm),
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IIC_iALUi, "sub", ".w\t$Rd, $sp, $imm", []> {
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def t2SUBrSPi : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$Rn, t2_so_imm:$imm),
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IIC_iALUi, "sub", ".w\t$Rd, $Rn, $imm", []> {
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let Inst{31-27} = 0b11110;
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let Inst{25} = 0;
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let Inst{24-21} = 0b1101;
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let Inst{19-16} = 0b1101; // Rn = sp
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let Inst{15} = 0;
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}
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def t2SUBrSPi12 : T2TwoRegImm<(outs GPR:$Rd), (ins GPR:$Rn, imm0_4095:$imm),
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@ -1198,9 +1200,9 @@ def t2SUBrSPi12 : T2TwoRegImm<(outs GPR:$Rd), (ins GPR:$Rn, imm0_4095:$imm),
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}
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// SUB r, sp, so_reg
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def t2SUBrSPs : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$sp, t2_so_reg:$imm),
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def t2SUBrSPs : T2sTwoRegImm<(outs GPR:$Rd), (ins GPR:$Rn, t2_so_reg:$imm),
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IIC_iALUsi,
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"sub", "\t$Rd, $sp, $imm", []> {
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"sub", "\t$Rd, $Rn, $imm", []> {
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let Inst{31-27} = 0b11101;
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let Inst{26-25} = 0b01;
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let Inst{24-21} = 0b1101;
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