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R600/SI: Handle VGPR64 destination in copyPhysReg().

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Allows nexuiz to run with radeonsi.

Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174655 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2013-02-07 19:39:43 +00:00
parent e7384db6f6
commit 60fc58262f
1 changed files with 9 additions and 1 deletions
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10
lib/Target/R600/SIInstrInfo.cpp
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@ -41,7 +41,15 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
// never be necessary.
assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC);
if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
if (AMDGPU::VReg_64RegClass.contains(DestReg)) {
assert(AMDGPU::VReg_64RegClass.contains(SrcReg) ||
AMDGPU::SReg_64RegClass.contains(SrcReg));
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), RI.getSubReg(DestReg, AMDGPU::sub0))
.addReg(RI.getSubReg(SrcReg, AMDGPU::sub0), getKillRegState(KillSrc))
.addReg(DestReg, RegState::Define | RegState::Implicit);
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), RI.getSubReg(DestReg, AMDGPU::sub1))
.addReg(RI.getSubReg(SrcReg, AMDGPU::sub1), getKillRegState(KillSrc));
} else if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
assert(AMDGPU::SReg_64RegClass.contains(SrcReg));
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg)
.addReg(SrcReg, getKillRegState(KillSrc));