mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-17 21:35:07 +00:00
For 32-bit non-pic tlv mach-o addressing we don't need a pic base or
a relative address. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106064 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
cad22ad0bf
commit
6102549737
@ -8543,6 +8543,15 @@ X86TargetLowering::EmitLoweredTLSCall(MachineInstr *MI,
|
||||
.addReg(0);
|
||||
MIB = BuildMI(BB, DL, TII->get(X86::CALL64m));
|
||||
addDirectMem(MIB, X86::RDI).addReg(0);
|
||||
} else if (getTargetMachine().getRelocationModel() != Reloc::PIC_) {
|
||||
MachineInstrBuilder MIB = BuildMI(BB, DL, TII->get(X86::MOV32rm), X86::EAX)
|
||||
.addReg(0)
|
||||
.addImm(0).addReg(0)
|
||||
.addGlobalAddress(MI->getOperand(3).getGlobal(), 0,
|
||||
MI->getOperand(3).getTargetFlags())
|
||||
.addReg(0);
|
||||
MIB = BuildMI(BB, DL, TII->get(X86::CALL32m));
|
||||
addDirectMem(MIB, X86::EAX).addReg(0);
|
||||
} else {
|
||||
MachineInstrBuilder MIB = BuildMI(BB, DL, TII->get(X86::MOV32rm), X86::EAX)
|
||||
.addReg(TII->getGlobalBaseReg(F))
|
||||
|
Loading…
x
Reference in New Issue
Block a user