diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp index 0fca9851794..055302f153a 100644 --- a/lib/CodeGen/BranchFolding.cpp +++ b/lib/CodeGen/BranchFolding.cpp @@ -46,7 +46,7 @@ namespace { struct BranchFolder : public MachineFunctionPass { static char ID; - BranchFolder(bool defaultEnableTailMerge) : + explicit BranchFolder(bool defaultEnableTailMerge) : MachineFunctionPass((intptr_t)&ID) { switch (FlagEnableTailMerge) { case cl::BOU_UNSET: EnableTailMerge = defaultEnableTailMerge; break; diff --git a/lib/CodeGen/VirtRegMap.h b/lib/CodeGen/VirtRegMap.h index b7cbe51cea3..e5d4b220fe0 100644 --- a/lib/CodeGen/VirtRegMap.h +++ b/lib/CodeGen/VirtRegMap.h @@ -75,7 +75,7 @@ namespace llvm { void operator=(const VirtRegMap&); // DO NOT IMPLEMENT public: - VirtRegMap(MachineFunction &mf); + explicit VirtRegMap(MachineFunction &mf); void grow(); diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h index 318657eb8e2..aba6ab3475a 100644 --- a/lib/Target/ARM/ARMISelLowering.h +++ b/lib/Target/ARM/ARMISelLowering.h @@ -76,7 +76,7 @@ namespace llvm { class ARMTargetLowering : public TargetLowering { int VarArgsFrameIndex; // FrameIndex for start of varargs area. public: - ARMTargetLowering(TargetMachine &TM); + explicit ARMTargetLowering(TargetMachine &TM); virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); virtual const char *getTargetNodeName(unsigned Opcode) const; diff --git a/lib/Target/Alpha/AlphaISelLowering.h b/lib/Target/Alpha/AlphaISelLowering.h index 24e40a55764..291a56065d8 100644 --- a/lib/Target/Alpha/AlphaISelLowering.h +++ b/lib/Target/Alpha/AlphaISelLowering.h @@ -64,7 +64,7 @@ namespace llvm { int VarArgsBase; // What is the base FrameIndex bool useITOF; public: - AlphaTargetLowering(TargetMachine &TM); + explicit AlphaTargetLowering(TargetMachine &TM); /// LowerOperation - Provide custom lowering hooks for some operations. /// diff --git a/lib/Target/IA64/IA64ISelLowering.h b/lib/Target/IA64/IA64ISelLowering.h index 6bc55348ce9..4a4e77186fb 100644 --- a/lib/Target/IA64/IA64ISelLowering.h +++ b/lib/Target/IA64/IA64ISelLowering.h @@ -43,7 +43,7 @@ namespace llvm { unsigned GP, SP, RP; // FIXME - clean this mess up public: - IA64TargetLowering(TargetMachine &TM); + explicit IA64TargetLowering(TargetMachine &TM); unsigned VirtGPR; // this is public so it can be accessed in the selector // for ISD::RET. add an accessor instead? FIXME diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h index 0199175a03f..4a62c94afeb 100644 --- a/lib/Target/Mips/MipsISelLowering.h +++ b/lib/Target/Mips/MipsISelLowering.h @@ -53,7 +53,7 @@ namespace llvm { // const MipsSubtarget &MipsSubTarget; public: - MipsTargetLowering(MipsTargetMachine &TM); + explicit MipsTargetLowering(MipsTargetMachine &TM); /// LowerOperation - Provide custom lowering hooks for some operations. virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index 245fe53e5a7..b6b52ef31e1 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -186,7 +186,7 @@ namespace llvm { int ReturnAddrIndex; // FrameIndex for return slot. const PPCSubtarget &PPCSubTarget; public: - PPCTargetLowering(PPCTargetMachine &TM); + explicit PPCTargetLowering(PPCTargetMachine &TM); /// getTargetNodeName() - This method returns the name of a target specific /// DAG node. diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index ef48095547e..55c34a3bbcb 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -286,7 +286,7 @@ namespace llvm { int BytesToPopOnReturn; // Number of arg bytes ret should pop. int BytesCallerReserves; // Number of arg bytes caller makes. public: - X86TargetLowering(TargetMachine &TM); + explicit X86TargetLowering(TargetMachine &TM); // Return the number of bytes that a function should pop when it returns (in // addition to the space used by the return address).