mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-08 18:30:04 +00:00
[arm] Implement ARM .arch directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197052 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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7a4d29e569
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@ -93,6 +93,7 @@ public:
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virtual void emitAttribute(unsigned Attribute, unsigned Value) = 0;
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virtual void emitTextAttribute(unsigned Attribute, StringRef String) = 0;
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virtual void emitFPU(unsigned FPU) = 0;
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virtual void emitArch(unsigned Arch) = 0;
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virtual void finishAttributeSection() = 0;
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};
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@ -12,6 +12,7 @@
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#include "ARMFeatures.h"
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#include "llvm/MC/MCTargetAsmParser.h"
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#include "MCTargetDesc/ARMAddressingModes.h"
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#include "MCTargetDesc/ARMArchName.h"
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#include "MCTargetDesc/ARMBaseInfo.h"
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#include "MCTargetDesc/ARMMCExpr.h"
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#include "llvm/ADT/BitVector.h"
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@ -8006,7 +8007,19 @@ bool ARMAsmParser::parseDirectiveUnreq(SMLoc L) {
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/// parseDirectiveArch
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/// ::= .arch token
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bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
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return true;
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StringRef Arch = getParser().parseStringToEndOfStatement().trim();
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unsigned ID = StringSwitch<unsigned>(Arch)
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#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
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.Case(NAME, ARM::ID)
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#include "MCTargetDesc/ARMArchName.def"
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.Default(ARM::INVALID_ARCH);
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if (ID == ARM::INVALID_ARCH)
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return Error(L, "Unknown arch name");
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getTargetStreamer().emitArch(ID);
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return false;
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}
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/// parseDirectiveEabiAttr
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45
lib/Target/ARM/MCTargetDesc/ARMArchName.def
Normal file
45
lib/Target/ARM/MCTargetDesc/ARMArchName.def
Normal file
@ -0,0 +1,45 @@
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//===-- ARMArchName.def - List of the ARM arch names ------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the list of the supported ARM architecture names,
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// i.e. the supported value for -march= option.
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//
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//===----------------------------------------------------------------------===//
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// NOTE: NO INCLUDE GUARD DESIRED!
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#ifndef ARM_ARCH_NAME
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#error "You must define ARM_ARCH_NAME before including ARMArchName.def"
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#endif
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// ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH)
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ARM_ARCH_NAME("armv2", ARMV2, "2", v4)
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ARM_ARCH_NAME("armv2a", ARMV2A, "2A", v4)
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ARM_ARCH_NAME("armv3", ARMV3, "3", v4)
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ARM_ARCH_NAME("armv3m", ARMV3M, "3M", v4)
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ARM_ARCH_NAME("armv4", ARMV4, "4", v4)
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ARM_ARCH_NAME("armv4t", ARMV4T, "4T", v4T)
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ARM_ARCH_NAME("armv5", ARMV5, "5", v5T)
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ARM_ARCH_NAME("armv5t", ARMV5T, "5T", v5T)
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ARM_ARCH_NAME("armv5te", ARMV5TE, "5TE", v5TE)
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ARM_ARCH_NAME("armv6", ARMV6, "6", v6)
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ARM_ARCH_NAME("armv6j", ARMV6J, "6J", v6)
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ARM_ARCH_NAME("armv6t2", ARMV6T2, "6T2", v6T2)
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ARM_ARCH_NAME("armv6z", ARMV6Z, "6Z", v6KZ)
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ARM_ARCH_NAME("armv6zk", ARMV6ZK, "6ZK", v6KZ)
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ARM_ARCH_NAME("armv6-m", ARMV6M, "6-M", v6_M)
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ARM_ARCH_NAME("armv7", ARMV7, "7", v7)
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ARM_ARCH_NAME("armv7-a", ARMV7A, "7-A", v7)
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ARM_ARCH_NAME("armv7-r", ARMV7R, "7-R", v7)
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ARM_ARCH_NAME("armv7-m", ARMV7M, "7-M", v7)
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ARM_ARCH_NAME("armv8-a", ARMV8A, "8-A", v8)
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ARM_ARCH_NAME("iwmmxt", IWMMXT, "iwmmxt", v5TE)
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ARM_ARCH_NAME("iwmmxt2", IWMMXT2, "iwmmxt2", v5TE)
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#undef ARM_ARCH_NAME
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26
lib/Target/ARM/MCTargetDesc/ARMArchName.h
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26
lib/Target/ARM/MCTargetDesc/ARMArchName.h
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@ -0,0 +1,26 @@
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//===-- ARMArchName.h - List of the ARM arch names --------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARMARCHNAME_H
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#define ARMARCHNAME_H
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namespace llvm {
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namespace ARM {
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enum ArchKind {
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INVALID_ARCH = 0
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#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) , ID
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#include "ARMArchName.def"
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};
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} // namespace ARM
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} // namespace llvm
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#endif // ARMARCHNAME_H
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@ -14,6 +14,7 @@
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//===----------------------------------------------------------------------===//
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#include "ARMBuildAttrs.h"
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#include "ARMArchName.h"
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#include "ARMFPUName.h"
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#include "ARMRegisterInfo.h"
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#include "ARMUnwindOp.h"
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@ -61,6 +62,42 @@ static const char *GetFPUName(unsigned ID) {
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return NULL;
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}
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static const char *GetArchName(unsigned ID) {
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switch (ID) {
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default:
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llvm_unreachable("Unknown ARCH kind");
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break;
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#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
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case ARM::ID: return NAME;
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#include "ARMArchName.def"
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}
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return NULL;
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}
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static const char *GetArchDefaultCPUName(unsigned ID) {
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switch (ID) {
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default:
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llvm_unreachable("Unknown ARCH kind");
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break;
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#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
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case ARM::ID: return DEFAULT_CPU_NAME;
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#include "ARMArchName.def"
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}
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return NULL;
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}
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static unsigned GetArchDefaultCPUArch(unsigned ID) {
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switch (ID) {
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default:
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llvm_unreachable("Unknown ARCH kind");
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break;
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#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
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case ARM::ID: return ARMBuildAttrs::DEFAULT_CPU_ARCH;
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#include "ARMArchName.def"
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}
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return 0;
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}
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namespace {
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class ARMELFStreamer;
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@ -82,6 +119,7 @@ class ARMTargetAsmStreamer : public ARMTargetStreamer {
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virtual void switchVendor(StringRef Vendor);
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virtual void emitAttribute(unsigned Attribute, unsigned Value);
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virtual void emitTextAttribute(unsigned Attribute, StringRef String);
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virtual void emitArch(unsigned Arch);
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virtual void emitFPU(unsigned FPU);
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virtual void finishAttributeSection();
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@ -143,6 +181,9 @@ void ARMTargetAsmStreamer::emitTextAttribute(unsigned Attribute,
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break;
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}
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}
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void ARMTargetAsmStreamer::emitArch(unsigned Arch) {
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OS << "\t.arch\t" << GetArchName(Arch) << "\n";
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}
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void ARMTargetAsmStreamer::emitFPU(unsigned FPU) {
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OS << "\t.fpu\t" << GetFPUName(FPU) << "\n";
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}
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@ -171,6 +212,7 @@ private:
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StringRef CurrentVendor;
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unsigned FPU;
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unsigned Arch;
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SmallVector<AttributeItem, 64> Contents;
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const MCSection *AttributeSection;
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@ -233,6 +275,7 @@ private:
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Contents.push_back(Item);
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}
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void emitArchDefaultAttributes();
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void emitFPUDefaultAttributes();
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ARMELFStreamer &getStreamer();
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@ -250,6 +293,7 @@ private:
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virtual void switchVendor(StringRef Vendor);
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virtual void emitAttribute(unsigned Attribute, unsigned Value);
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virtual void emitTextAttribute(unsigned Attribute, StringRef String);
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virtual void emitArch(unsigned Arch);
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virtual void emitFPU(unsigned FPU);
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virtual void finishAttributeSection();
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@ -258,7 +302,7 @@ private:
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public:
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ARMTargetELFStreamer()
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: ARMTargetStreamer(), CurrentVendor("aeabi"), FPU(ARM::INVALID_FPU),
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AttributeSection(0) {
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Arch(ARM::INVALID_ARCH), AttributeSection(0) {
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}
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};
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@ -491,6 +535,96 @@ void ARMTargetELFStreamer::emitTextAttribute(unsigned Attribute,
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StringRef Value) {
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setAttributeItem(Attribute, Value, /* OverwriteExisting= */ true);
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}
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void ARMTargetELFStreamer::emitArch(unsigned Value) {
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Arch = Value;
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}
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void ARMTargetELFStreamer::emitArchDefaultAttributes() {
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using namespace ARMBuildAttrs;
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setAttributeItem(CPU_name, GetArchDefaultCPUName(Arch), false);
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setAttributeItem(CPU_arch, GetArchDefaultCPUArch(Arch), false);
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switch (Arch) {
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case ARM::ARMV2:
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case ARM::ARMV2A:
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case ARM::ARMV3:
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case ARM::ARMV3M:
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case ARM::ARMV4:
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case ARM::ARMV5:
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setAttributeItem(ARM_ISA_use, Allowed, false);
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break;
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case ARM::ARMV4T:
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case ARM::ARMV5T:
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case ARM::ARMV5TE:
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case ARM::ARMV6:
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case ARM::ARMV6J:
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setAttributeItem(ARM_ISA_use, Allowed, false);
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setAttributeItem(THUMB_ISA_use, Allowed, false);
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break;
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case ARM::ARMV6T2:
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setAttributeItem(ARM_ISA_use, Allowed, false);
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setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
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break;
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case ARM::ARMV6Z:
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case ARM::ARMV6ZK:
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setAttributeItem(ARM_ISA_use, Allowed, false);
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setAttributeItem(THUMB_ISA_use, Allowed, false);
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setAttributeItem(Virtualization_use, AllowTZ, false);
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break;
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case ARM::ARMV6M:
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setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
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setAttributeItem(THUMB_ISA_use, Allowed, false);
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break;
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case ARM::ARMV7:
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setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
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break;
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case ARM::ARMV7A:
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setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
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setAttributeItem(ARM_ISA_use, Allowed, false);
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setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
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break;
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case ARM::ARMV7R:
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setAttributeItem(CPU_arch_profile, RealTimeProfile, false);
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setAttributeItem(ARM_ISA_use, Allowed, false);
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setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
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break;
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case ARM::ARMV7M:
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setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
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setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
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break;
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case ARM::ARMV8A:
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setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
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setAttributeItem(ARM_ISA_use, Allowed, false);
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setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
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setAttributeItem(MPextension_use, Allowed, false);
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setAttributeItem(Virtualization_use, AllowTZVirtualization, false);
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break;
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case ARM::IWMMXT:
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setAttributeItem(ARM_ISA_use, Allowed, false);
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setAttributeItem(THUMB_ISA_use, Allowed, false);
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setAttributeItem(WMMX_arch, AllowWMMXv1, false);
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break;
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case ARM::IWMMXT2:
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setAttributeItem(ARM_ISA_use, Allowed, false);
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setAttributeItem(THUMB_ISA_use, Allowed, false);
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setAttributeItem(WMMX_arch, AllowWMMXv2, false);
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break;
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default:
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report_fatal_error("Unknown Arch: " + Twine(Arch));
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break;
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}
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}
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void ARMTargetELFStreamer::emitFPU(unsigned Value) {
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FPU = Value;
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}
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@ -597,6 +731,9 @@ void ARMTargetELFStreamer::finishAttributeSection() {
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if (FPU != ARM::INVALID_FPU)
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emitFPUDefaultAttributes();
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if (Arch != ARM::INVALID_ARCH)
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emitArchDefaultAttributes();
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if (Contents.empty())
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return;
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30
test/MC/ARM/directive-arch-armv2.s
Normal file
30
test/MC/ARM/directive-arch-armv2.s
Normal file
@ -0,0 +1,30 @@
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@ Test the .arch directive for armv2
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@ This test case will check the default .ARM.attributes value for the
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@ armv2 architecture.
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@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
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@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
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@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
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@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
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.syntax unified
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.arch armv2
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@ CHECK-ASM: .arch armv2
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@ CHECK-OBJ: Name: .ARM.attributes
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@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
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@ CHECK-OBJ: Flags [ (0x0)
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@ CHECK-OBJ: ]
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@ CHECK-OBJ: Address: 0x0
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@ CHECK-OBJ: Offset: 0x34
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@ CHECK-OBJ: Size: 23
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@ CHECK-OBJ: Link: 0
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@ CHECK-OBJ: Info: 0
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@ CHECK-OBJ: AddressAlignment: 1
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@ CHECK-OBJ: EntrySize: 0
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@ CHECK-OBJ: SectionData (
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@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
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@ CHECK-OBJ: 0010: 05320006 010801 |.2.....|
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@ CHECK-OBJ: )
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30
test/MC/ARM/directive-arch-armv2a.s
Normal file
30
test/MC/ARM/directive-arch-armv2a.s
Normal file
@ -0,0 +1,30 @@
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@ Test the .arch directive for armv2a
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@ This test case will check the default .ARM.attributes value for the
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@ armv2a architecture.
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@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
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@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
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@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
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@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
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.syntax unified
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.arch armv2a
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@ CHECK-ASM: .arch armv2a
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@ CHECK-OBJ: Name: .ARM.attributes
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@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
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@ CHECK-OBJ: Flags [ (0x0)
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@ CHECK-OBJ: ]
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@ CHECK-OBJ: Address: 0x0
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@ CHECK-OBJ: Offset: 0x34
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@ CHECK-OBJ: Size: 24
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@ CHECK-OBJ: Link: 0
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@ CHECK-OBJ: Info: 0
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@ CHECK-OBJ: AddressAlignment: 1
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@ CHECK-OBJ: EntrySize: 0
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@ CHECK-OBJ: SectionData (
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@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......|
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@ CHECK-OBJ: 0010: 05324100 06010801 |.2A.....|
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@ CHECK-OBJ: )
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30
test/MC/ARM/directive-arch-armv3.s
Normal file
30
test/MC/ARM/directive-arch-armv3.s
Normal file
@ -0,0 +1,30 @@
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@ Test the .arch directive for armv3
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@ This test case will check the default .ARM.attributes value for the
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@ armv3 architecture.
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@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
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@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
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@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
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@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
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.syntax unified
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.arch armv3
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@ CHECK-ASM: .arch armv3
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@ CHECK-OBJ: Name: .ARM.attributes
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@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
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@ CHECK-OBJ: Flags [ (0x0)
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@ CHECK-OBJ: ]
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@ CHECK-OBJ: Address: 0x0
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@ CHECK-OBJ: Offset: 0x34
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@ CHECK-OBJ: Size: 23
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@ CHECK-OBJ: Link: 0
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@ CHECK-OBJ: Info: 0
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@ CHECK-OBJ: AddressAlignment: 1
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@ CHECK-OBJ: EntrySize: 0
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@ CHECK-OBJ: SectionData (
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@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
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@ CHECK-OBJ: 0010: 05330006 010801 |.3.....|
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@ CHECK-OBJ: )
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30
test/MC/ARM/directive-arch-armv3m.s
Normal file
30
test/MC/ARM/directive-arch-armv3m.s
Normal file
@ -0,0 +1,30 @@
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@ Test the .arch directive for armv3m
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@ This test case will check the default .ARM.attributes value for the
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@ armv3m architecture.
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@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
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@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
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@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
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@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
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.syntax unified
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.arch armv3m
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@ CHECK-ASM: .arch armv3m
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||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 24
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05334D00 06010801 |.3M.....|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv4.s
Normal file
30
test/MC/ARM/directive-arch-armv4.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv4
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv4 architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv4
|
||||
|
||||
@ CHECK-ASM: .arch armv4
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 23
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05340006 010801 |.4.....|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv4t.s
Normal file
30
test/MC/ARM/directive-arch-armv4t.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv4t
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv4t architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv4t
|
||||
|
||||
@ CHECK-ASM: .arch armv4t
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 26
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05345400 06020801 0901 |.4T.......|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv5.s
Normal file
30
test/MC/ARM/directive-arch-armv5.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv5
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv5 architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv5
|
||||
|
||||
@ CHECK-ASM: .arch armv5
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 23
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05350006 030801 |.5.....|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv5t.s
Normal file
30
test/MC/ARM/directive-arch-armv5t.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv5t
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv5t architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv5t
|
||||
|
||||
@ CHECK-ASM: .arch armv5t
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 26
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05355400 06030801 0901 |.5T.......|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv5te.s
Normal file
30
test/MC/ARM/directive-arch-armv5te.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv5te
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv5te architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv5te
|
||||
|
||||
@ CHECK-ASM: .arch armv5te
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 27
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05355445 00060408 010901 |.5TE.......|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv6-m.s
Normal file
30
test/MC/ARM/directive-arch-armv6-m.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv6-m
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv6-m architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv6-m
|
||||
|
||||
@ CHECK-ASM: .arch armv6-m
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 27
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05362D4D 00060B07 4D0901 |.6-M....M..|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv6.s
Normal file
30
test/MC/ARM/directive-arch-armv6.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv6
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv6 architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv6
|
||||
|
||||
@ CHECK-ASM: .arch armv6
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 25
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05360006 06080109 01 |.6.......|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv6j.s
Normal file
30
test/MC/ARM/directive-arch-armv6j.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv6j
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv6j architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv6j
|
||||
|
||||
@ CHECK-ASM: .arch armv6j
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 26
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05364A00 06060801 0901 |.6J.......|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv6t2.s
Normal file
30
test/MC/ARM/directive-arch-armv6t2.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv6t2
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv6t2 architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv6t2
|
||||
|
||||
@ CHECK-ASM: .arch armv6t2
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 27
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05365432 00060808 010902 |.6T2.......|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv6z.s
Normal file
30
test/MC/ARM/directive-arch-armv6z.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv6z
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv6z architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv6z
|
||||
|
||||
@ CHECK-ASM: .arch armv6z
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 28
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411B0000 00616561 62690001 11000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05365A00 06070801 09014401 |.6Z.......D.|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv6zk.s
Normal file
30
test/MC/ARM/directive-arch-armv6zk.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv6zk
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv6zk architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv6zk
|
||||
|
||||
@ CHECK-ASM: .arch armv6zk
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 29
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05365A4B 00060708 01090144 01 |.6ZK.......D.|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv7-a.s
Normal file
30
test/MC/ARM/directive-arch-armv7-a.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv7-a
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv7-a architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv7-a
|
||||
|
||||
@ CHECK-ASM: .arch armv7-a
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 29
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv7-m.s
Normal file
30
test/MC/ARM/directive-arch-armv7-m.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv7-m
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv7-m architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv7-m
|
||||
|
||||
@ CHECK-ASM: .arch armv7-m
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 27
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv7-r.s
Normal file
30
test/MC/ARM/directive-arch-armv7-r.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv7-r
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv7-r architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv7-r
|
||||
|
||||
@ CHECK-ASM: .arch armv7-r
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 29
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-armv7.s
Normal file
30
test/MC/ARM/directive-arch-armv7.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for armv7
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv7 architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv7
|
||||
|
||||
@ CHECK-ASM: .arch armv7
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 23
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05370006 0A0902 |.7.....|
|
||||
@ CHECK-OBJ: )
|
31
test/MC/ARM/directive-arch-armv8-a.s
Normal file
31
test/MC/ARM/directive-arch-armv8-a.s
Normal file
@ -0,0 +1,31 @@
|
||||
@ Test the .arch directive for armv8-a
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ armv8-a architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch armv8-a
|
||||
|
||||
@ CHECK-ASM: .arch armv8-a
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 33
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|
|
||||
@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D|
|
||||
@ CHECK-OBJ: 0020: 03 |.|
|
||||
@ CHECK-OBJ: )
|
30
test/MC/ARM/directive-arch-iwmmxt.s
Normal file
30
test/MC/ARM/directive-arch-iwmmxt.s
Normal file
@ -0,0 +1,30 @@
|
||||
@ Test the .arch directive for iwmmxt
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ iwmmxt architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch iwmmxt
|
||||
|
||||
@ CHECK-ASM: .arch iwmmxt
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 32
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 411F0000 00616561 62690001 15000000 |A....aeabi......|
|
||||
@ CHECK-OBJ: 0010: 0549574D 4D585400 06040801 09010B01 |.IWMMXT.........|
|
||||
@ CHECK-OBJ: )
|
31
test/MC/ARM/directive-arch-iwmmxt2.s
Normal file
31
test/MC/ARM/directive-arch-iwmmxt2.s
Normal file
@ -0,0 +1,31 @@
|
||||
@ Test the .arch directive for iwmmxt2
|
||||
|
||||
@ This test case will check the default .ARM.attributes value for the
|
||||
@ iwmmxt2 architecture.
|
||||
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
|
||||
@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
|
||||
@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
|
||||
@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
|
||||
|
||||
.syntax unified
|
||||
.arch iwmmxt2
|
||||
|
||||
@ CHECK-ASM: .arch iwmmxt2
|
||||
|
||||
@ CHECK-OBJ: Name: .ARM.attributes
|
||||
@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
|
||||
@ CHECK-OBJ: Flags [ (0x0)
|
||||
@ CHECK-OBJ: ]
|
||||
@ CHECK-OBJ: Address: 0x0
|
||||
@ CHECK-OBJ: Offset: 0x34
|
||||
@ CHECK-OBJ: Size: 33
|
||||
@ CHECK-OBJ: Link: 0
|
||||
@ CHECK-OBJ: Info: 0
|
||||
@ CHECK-OBJ: AddressAlignment: 1
|
||||
@ CHECK-OBJ: EntrySize: 0
|
||||
@ CHECK-OBJ: SectionData (
|
||||
@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|
|
||||
@ CHECK-OBJ: 0010: 0549574D 4D585432 00060408 0109010B |.IWMMXT2........|
|
||||
@ CHECK-OBJ: 0020: 02 |.|
|
||||
@ CHECK-OBJ: )
|
Loading…
Reference in New Issue
Block a user