Use function attributes to indicate that we don't want to realign the stack.

Function attributes are the future! So just query whether we want to realign the
stack directly from the function instead of through a random target options
structure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187618 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
2013-08-01 21:42:05 +00:00
parent 8cb1d81250
commit 61fc8d670f
15 changed files with 713 additions and 52 deletions

View File

@@ -1,30 +1,14 @@
; RUN: llc < %s -mtriple=armv7-apple-ios -O0 -realign-stack=0 | FileCheck %s -check-prefix=NO-REALIGN
; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s
; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=NO-REALIGN
; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=REALIGN
; rdar://12713765
; When realign-stack is set to false, make sure we are not creating stack
; objects that are assumed to be 64-byte aligned.
@T3_retval = common global <16 x float> zeroinitializer, align 16
define void @test(<16 x float>* noalias sret %agg.result) nounwind ssp {
define void @test1(<16 x float>* noalias sret %agg.result) nounwind ssp "no-realign-stack" {
entry:
; CHECK: test
; CHECK: bic sp, sp, #63
; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
; CHECK: vst1.64
; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
; CHECK: vst1.64
; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
; CHECK: vst1.64
; CHECK: vst1.64
; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
; CHECK: vst1.64
; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
; CHECK: vst1.64
; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
; CHECK: vst1.64
; CHECK: vst1.64
; NO-REALIGN: test
; NO-REALIGN: test1
; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
; NO-REALIGN: vst1.64
; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
@@ -46,3 +30,29 @@ entry:
store <16 x float> %1, <16 x float>* %agg.result, align 16
ret void
}
define void @test2(<16 x float>* noalias sret %agg.result) nounwind ssp {
entry:
; REALIGN: test2
; REALIGN: bic sp, sp, #63
; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
; REALIGN: vst1.64
; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
; REALIGN: vst1.64
; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
; REALIGN: vst1.64
; REALIGN: vst1.64
; REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
; REALIGN: vst1.64
; REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
; REALIGN: vst1.64
; REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
; REALIGN: vst1.64
; REALIGN: vst1.64
%retval = alloca <16 x float>, align 16
%0 = load <16 x float>* @T3_retval, align 16
store <16 x float> %0, <16 x float>* %retval
%1 = load <16 x float>* %retval
store <16 x float> %1, <16 x float>* %agg.result, align 16
ret void
}