From 625518002de57fb9e5e95856b7554372ac6f0210 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 21 Jul 2006 08:26:46 +0000 Subject: [PATCH] This opt is now handled in DAG combine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 2ae607c182c..4ebe4caad09 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2393,8 +2393,6 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) { bool V2IsUndef = V2.getOpcode() == ISD::UNDEF; if (isSplatMask(PermMask.Val)) { - if (ISD::isBuildVectorAllZeros(V1.Val) || ISD::isBuildVectorAllOnes(V1.Val)) - return V1; if (NumElems <= 4) return Op; // Promote it to a v4i32 splat. return PromoteSplat(Op, DAG);